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RISC-V: Add RV64E support to GDB
Since RV32E and RV64E are ratified, RV64E is no longer invalid. So, this commit adds RV64E support for various parts.
1 parent 6f85247 commit 01a54d0

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6 files changed

+77
-11
lines changed

6 files changed

+77
-11
lines changed

‎gdb/arch/riscv.c‎

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#include "../features/riscv/32bit-fpu.c"
2626
#include "../features/riscv/64bit-fpu.c"
2727
#include "../features/riscv/rv32e-xregs.c"
28+
#include "../features/riscv/rv64e-xregs.c"
2829

2930
#ifndef GDBSERVER
3031
#define STATIC_IN_GDB static
@@ -51,7 +52,12 @@ riscv_create_target_description (const struct riscv_gdbarch_features features)
5152
arch_name.append (":rv32i");
5253
}
5354
else if (features.xlen == 8)
54-
arch_name.append (":rv64i");
55+
{
56+
if (features.embedded)
57+
arch_name.append (":rv64e");
58+
else
59+
arch_name.append (":rv64i");
60+
}
5561
else if (features.xlen == 16)
5662
arch_name.append (":rv128i");
5763

@@ -76,7 +82,12 @@ riscv_create_target_description (const struct riscv_gdbarch_features features)
7682
regnum = create_feature_riscv_32bit_cpu (tdesc.get (), regnum);
7783
}
7884
else if (features.xlen == 8)
79-
regnum = create_feature_riscv_64bit_cpu (tdesc.get (), regnum);
85+
{
86+
if (features.embedded)
87+
regnum = create_feature_riscv_rv64e_xregs (tdesc.get (), regnum);
88+
else
89+
regnum = create_feature_riscv_64bit_cpu (tdesc.get (), regnum);
90+
}
8091

8192
/* For now we only support creating 32-bit or 64-bit f-registers. */
8293
if (features.flen == 4)

‎gdb/arch/riscv.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ struct riscv_gdbarch_features
5353
vector size. */
5454
int vlen = 0;
5555

56-
/* When true this target is RV32E. */
56+
/* When true this target is RV32E or RV64E. */
5757
bool embedded = false;
5858

5959
/* Track if the target description has an fcsr, fflags, and frm

‎gdb/features/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -238,6 +238,7 @@ FEATURE_XMLFILES = aarch64-core.xml \
238238
loongarch/base64.xml \
239239
loongarch/fpu.xml \
240240
riscv/rv32e-xregs.xml \
241+
riscv/rv64e-xregs.xml \
241242
riscv/32bit-cpu.xml \
242243
riscv/32bit-fpu.xml \
243244
riscv/64bit-cpu.xml \

‎gdb/features/riscv/rv64e-xregs.c‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
2+
Original: rv64e-xregs.xml */
3+
4+
#include "gdbsupport/tdesc.h"
5+
6+
static int
7+
create_feature_riscv_rv64e_xregs (struct target_desc *result, long regnum)
8+
{
9+
struct tdesc_feature *feature;
10+
11+
feature = tdesc_create_feature (result, "org.gnu.gdb.riscv.cpu");
12+
tdesc_create_reg (feature, "zero", regnum++, 1, NULL, 64, "int");
13+
tdesc_create_reg (feature, "ra", regnum++, 1, NULL, 64, "code_ptr");
14+
tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 64, "data_ptr");
15+
tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 64, "data_ptr");
16+
tdesc_create_reg (feature, "tp", regnum++, 1, NULL, 64, "data_ptr");
17+
tdesc_create_reg (feature, "t0", regnum++, 1, NULL, 64, "int");
18+
tdesc_create_reg (feature, "t1", regnum++, 1, NULL, 64, "int");
19+
tdesc_create_reg (feature, "t2", regnum++, 1, NULL, 64, "int");
20+
tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 64, "data_ptr");
21+
tdesc_create_reg (feature, "s1", regnum++, 1, NULL, 64, "int");
22+
tdesc_create_reg (feature, "a0", regnum++, 1, NULL, 64, "int");
23+
tdesc_create_reg (feature, "a1", regnum++, 1, NULL, 64, "int");
24+
tdesc_create_reg (feature, "a2", regnum++, 1, NULL, 64, "int");
25+
tdesc_create_reg (feature, "a3", regnum++, 1, NULL, 64, "int");
26+
tdesc_create_reg (feature, "a4", regnum++, 1, NULL, 64, "int");
27+
tdesc_create_reg (feature, "a5", regnum++, 1, NULL, 64, "int");
28+
tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 64, "code_ptr");
29+
return regnum;
30+
}

‎gdb/features/riscv/rv64e-xregs.xml‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
<?xml version="1.0"?>
2+
<!-- Copyright (C) 2018-2023 Free Software Foundation, Inc.
3+
4+
Copying and distribution of this file, with or without modification,
5+
are permitted in any medium without royalty provided the copyright
6+
notice and this notice are preserved. -->
7+
8+
<!-- Register numbers are hard-coded in order to maintain backward
9+
compatibility with older versions of tools that didn't use xml
10+
register descriptions. -->
11+
12+
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
13+
<feature name="org.gnu.gdb.riscv.cpu">
14+
<reg name="zero" bitsize="64" type="int" regnum="0"/>
15+
<reg name="ra" bitsize="64" type="code_ptr"/>
16+
<reg name="sp" bitsize="64" type="data_ptr"/>
17+
<reg name="gp" bitsize="64" type="data_ptr"/>
18+
<reg name="tp" bitsize="64" type="data_ptr"/>
19+
<reg name="t0" bitsize="64" type="int"/>
20+
<reg name="t1" bitsize="64" type="int"/>
21+
<reg name="t2" bitsize="64" type="int"/>
22+
<reg name="fp" bitsize="64" type="data_ptr"/>
23+
<reg name="s1" bitsize="64" type="int"/>
24+
<reg name="a0" bitsize="64" type="int"/>
25+
<reg name="a1" bitsize="64" type="int"/>
26+
<reg name="a2" bitsize="64" type="int"/>
27+
<reg name="a3" bitsize="64" type="int"/>
28+
<reg name="a4" bitsize="64" type="int"/>
29+
<reg name="a5" bitsize="64" type="int"/>
30+
<reg name="pc" bitsize="64" type="code_ptr"/>
31+
</feature>

‎gdb/riscv-tdep.c‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3847,14 +3847,7 @@ riscv_features_from_bfd (const bfd *abfd)
38473847
features.flen = 4;
38483848

38493849
if (e_flags & EF_RISCV_RVE)
3850-
{
3851-
if (features.xlen == 8)
3852-
{
3853-
warning (_("64-bit ELF with RV32E flag set! Assuming 32-bit"));
3854-
features.xlen = 4;
3855-
}
3856-
features.embedded = true;
3857-
}
3850+
features.embedded = true;
38583851
}
38593852

38603853
return features;

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