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himbächel: Initial implementation
Signed-off-by: gatecat <[email protected]>
1 parent e3529d3 commit 57b923a

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.github/ci/build_himbaechel.sh

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#!/bin/bash
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function get_dependencies {
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:
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}
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function build_nextpnr {
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mkdir build
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pushd build
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cmake .. -DARCH=himbaechel
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make nextpnr-himbaechel bbasm -j`nproc`
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# We'd ideally use pypy3 for speed (as works locally), but the version
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# our CI Ubuntu provides doesn't like some of the typing stuff
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python3 ../himbaechel/uarch/example/example_arch_gen.py ./example.bba
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./bba/bbasm --l ./example.bba ./example.bin
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popd
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}
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function run_tests {
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:
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}
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function run_archcheck {
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pushd build
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./nextpnr-himbaechel --uarch example --chipdb ./example.bin --test
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popd
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}

.github/workflows/arch_ci.yml

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strategy:
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fail-fast: false
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matrix:
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arch: [mistral, ice40, ecp5, generic, nexus, machxo2, gowin]
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arch: [mistral, ice40, ecp5, generic, nexus, machxo2, gowin, himbaechel]
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runs-on: ubuntu-latest
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env:
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DEPS_PATH: ${{ github.workspace }}/deps
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- name: Install
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run: |
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sudo apt-get update
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sudo apt-get install git make cmake libboost-all-dev python3-dev libeigen3-dev tcl-dev lzma-dev libftdi-dev clang bison flex swig qtbase5-dev qtchooser qt5-qmake qtbase5-dev-tools iverilog
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sudo apt-get install git make cmake libboost-all-dev python3-dev pypy3 libeigen3-dev tcl-dev lzma-dev libftdi-dev clang bison flex swig qtbase5-dev qtchooser qt5-qmake qtbase5-dev-tools iverilog
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- name: Cache yosys installation
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uses: actions/cache@v3

CMakeLists.txt

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set(PROGRAM_PREFIX "" CACHE STRING "Name prefix for executables")
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# List of families to build
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set(FAMILIES generic ice40 ecp5 nexus gowin fpga_interchange machxo2 mistral)
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set(FAMILIES generic ice40 ecp5 nexus gowin fpga_interchange machxo2 mistral himbaechel)
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set(STABLE_FAMILIES generic ice40 ecp5)
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set(EXPERIMENTAL_FAMILIES nexus gowin fpga_interchange machxo2 mistral)
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set(EXPERIMENTAL_FAMILIES nexus gowin fpga_interchange machxo2 mistral himbaechel)
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set(ARCH "" CACHE STRING "Architecture family for nextpnr build")
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set_property(CACHE ARCH PROPERTY STRINGS ${FAMILIES})

docs/himbaechel.md

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# Himbächel - a series of bigger arches
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[Viaduct](./viaduct.md) enables custom architectures to be easily prototyped using a C++ API to build in-memory databases; with most of the flexibility of nextpnr's validity checking capabilities to hand. This is the recommended way to get started quickly with FPGAs up to about 20k logic elements, where no other particularly unusal requirements exist.
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However, building the routing graph in-memory at every startup and storing it flat doesn't scale at all well with larger FPGAs (say, 100k LEs or bigger).
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So, we take advantage of nextpnr's support for complex, non-flat routing graph structures and define a deduplication approach that's designed to work better even for very large fabrics - the database size is unlikely to exceed about 100MB even for million-LUT scale devices, compared to multiple gigabytes for a flat database.
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Python scripting is defined that allows the user to describe a semi-flattened routing graph and build the deduplicated database binary _at compile time_. Pips - routing switches - are described per tile type rather than flat; however, the connectivity between tiles ("nodes") are described flat and automatically deduplicated during database build.
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## Getting Started
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Most of what's written in the [viaduct docs](./viaduct.md) also applies to bootstrapping a Himbächel arch - this also provides a migration path for an existing Viaduct architecture. Just replace `viaduct` with `himbaechel` and `ViaductAPI` with `HimbaechelAPI` - the set of validity checking and custom flow "hooks" that you have access to is designed to be otherwise as close as possible.
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However, the key difference is that you will need to generate a "binary blob" chip database. `himbaechel_dbgen/bba.py` provides a framework for this. The typical steps for using this API would be as follows:
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- Create a `Chip` instance
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- For each unique "tile type" in the design (e.g. logic, BRAM, IO - in some cases multiple variants of these may be multiple tile types):
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- Create it using `Chip.create_tile_type`
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- Add local wires (connectivity between tiles is dealt with later) using `TileType.create_wire`
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- Add bels (like LUTs and FFs) using `TileType.create_bel`, and pins to those bels using `TileType.add_bel_pin`
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- Add pips using `TileType.create_pip`
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- For each grid location, use `Chip.set_tile_type` to set its tile type. Every location must have a tile type set, even if it's just an empty "NULL" tile
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- Whenever wires span multiple tiles (i.e. all wires with a length greater than zero), combine the per-tile local wires into a single node using `Chip.add_node` for each case.
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- Write out the `.bba` file using `Chip.write_bba`
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- Compile it into a binary that nextpnr can load using `./bba/bbasm --l my_chipdb.bba my_chipdb.bin`
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An example Python generator to copy from is located in `uarch/example/example_arch_gen.py`.

gui/himbaechel/family.cmake

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gui/himbaechel/mainwindow.cpp

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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Miodrag Milanovic <[email protected]>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "mainwindow.h"
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#include <QMessageBox>
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#include <cstdlib>
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static void initMainResource() { Q_INIT_RESOURCE(nextpnr); }
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NEXTPNR_NAMESPACE_BEGIN
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MainWindow::MainWindow(std::unique_ptr<Context> context, CommandHandler *handler, QWidget *parent)
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: BaseMainWindow(std::move(context), handler, parent)
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{
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initMainResource();
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}
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MainWindow::~MainWindow() {}
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void MainWindow::newContext(Context *ctx)
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{
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std::string title = "nextpnr-himbächel - " + ctx->getChipName();
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setWindowTitle(title.c_str());
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}
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void MainWindow::createMenu() {}
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void MainWindow::new_proj()
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{
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QMessageBox::critical(0, "Error",
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"Creating a new project not supported in himbächel mode, please re-start from command line.");
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std::exit(1);
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}
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NEXTPNR_NAMESPACE_END

gui/himbaechel/mainwindow.h

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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Miodrag Milanovic <[email protected]>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef MAINWINDOW_H
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#define MAINWINDOW_H
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#include "../basewindow.h"
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NEXTPNR_NAMESPACE_BEGIN
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class MainWindow : public BaseMainWindow
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{
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Q_OBJECT
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public:
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explicit MainWindow(std::unique_ptr<Context> context, CommandHandler *handler, QWidget *parent = 0);
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virtual ~MainWindow();
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public:
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void createMenu();
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protected Q_SLOTS:
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void new_proj() override;
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void newContext(Context *ctx);
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};
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NEXTPNR_NAMESPACE_END
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#endif // MAINWINDOW_H

gui/himbaechel/nextpnr.qrc

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<RCC>
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</RCC>

himbaechel/.gitignore

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__pycache__

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