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19 | 19 | ### 1. Programming and Execution Model
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| -In the SDAccel™ environment framework, an application is split into a host program and hardware accelerated kernels, with a communication channel between them for data transfer. The host application, written in C/C++ and using API calls like OpenCL, runs on an x86 server; the hardware accelerated kernels run within the Xilinx FPGA on an Alveo accelerator card. [Read more...](/docs/sdaccel-execution-model/) |
| 21 | +In the SDAccel™ environment framework, an application is split into a host program and hardware accelerated kernels, with a communication channel between them for data transfer. The host application, written in C/C++ and using API calls like OpenCL™, runs on an x86 server; the hardware accelerated kernels run within the Xilinx FPGA on an Alveo™ Data Center accelerator card. |
| 22 | + |
| 23 | +[Read more...](/docs/sdaccel-execution-model/) |
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23 | 25 | ### 2. Setting up the Alveo Accelerator Cards and SDAccel Tools
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| -Xilinx® Alveo™ Data Center accelerator cards provide compute acceleration performance and flexibility for Data Centers looking to increase throughput. You can install Alveo accelerator cards in deployment systems for running accelerated applications, or in SDAccel development systems, you can develop, debug, and optimize applications running on Alveo accelerator cards. [Read more...](/docs/alveo-getting-started/) |
| 27 | +Alveo Data Center accelerator cards provide compute acceleration performance and flexibility for Data Centers looking to increase throughput. You can install Alveo accelerator cards in deployment systems for running accelerated applications, or in SDAccel development systems, you can develop, debug, and optimize applications running on Alveo accelerator cards. |
| 28 | + |
| 29 | +[Read more...](/docs/alveo-getting-started/) |
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27 | 31 | ### 3. Building the Accelerated Application - Essential Concepts
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@@ -50,13 +54,13 @@ In this tutorial, you will learn how to do the following:
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51 | 55 | [Read more...](/docs/my-first-sdaccel-application/)
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| -### 5. Optimizing Accelerated FPGA Applications - Based on SDAccel Methodology |
| 57 | +### 5. Optimizing Accelerated FPGA Applications — Based on SDAccel Environment Methodology |
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55 | 59 | The methodology for developing optimized accelerated applications is comprised of two major phases: architecting the application, and developing the hardware kernels. In the first phase, you make key decisions about the application architecture by determining which software functions should be accelerated onto FPGA kernels, how much parallelism can be achieved, and how to deliver it in code. In the second phase, you implement the kernels by structuring the source code, and applying the necessary compiler options and pragmas to create the kernel architecture needed to achieve the optimized performance target.
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57 | 61 | In this tutorial, you will learn how to do the following:
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| -- Create an SDAccel application from the C application. |
| 63 | +- Create an SDAccel environment application from the C application. |
60 | 64 | - Optimize memory transfers.
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61 | 65 | - Optimize using fixed point data types.
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62 | 66 | - Optimize with dataflow.
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