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hermantbhermantb
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Update for clang -fsanitize
I tried to fix all remaining warnings/errors reported by -fsanitize. The riscv64-gen.c is a bit large because it contained a lot of warnings. I forgot some arm-link.c changes in last commit. The other changes are all small fixes to avoid warnings/errors.
1 parent 8025a82 commit 666e88e

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8 files changed

+68
-74
lines changed

8 files changed

+68
-74
lines changed

‎arm-gen.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -310,7 +310,7 @@ static uint32_t stuff_const(uint32_t op, uint32_t c)
310310
if(c<256) /* catch undefined <<32 */
311311
return op|c;
312312
for(i=2;i<32;i+=2) {
313-
m=(0xff>>i)|(0xff<<(32-i));
313+
m=(0xffu>>i)|(0xffu<<(32-i));
314314
if(!(c&~m))
315315
return op|(i<<7)|(c<<i)|(c>>(32-i));
316316
}
@@ -593,7 +593,7 @@ void load(int r, SValue *sv)
593593
sign=0;
594594
else {
595595
sign=1;
596-
fc=-fc;
596+
fc=-(unsigned)fc;
597597
}
598598

599599
v = fr & VT_VALMASK;

‎arm-link.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -201,10 +201,10 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
201201
write32le(ptr, read32le(ptr) & 0xff000000);
202202
if (x & 0x800000)
203203
x -= 0x1000000;
204-
x <<= 2;
204+
x = (unsigned) x << 2;
205205
blx_avail = (CONFIG_TCC_CPUVER >= 5);
206206
is_thumb = val & 1;
207-
is_bl = (*(unsigned *) ptr) >> 24 == 0xeb;
207+
is_bl = ((unsigned) read32le(ptr)) >> 24 == 0xeb;
208208
is_call = (type == R_ARM_CALL || (type == R_ARM_PC24 && is_bl));
209209
x += val - addr;
210210
#ifdef DEBUG_RELOC
@@ -241,8 +241,8 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
241241
return;
242242

243243
/* Get initial offset */
244-
hi = (*(uint16_t *)ptr);
245-
lo = (*(uint16_t *)(ptr+2));
244+
hi = (uint16_t) read16le(ptr);
245+
lo = (uint16_t) read16le(ptr+2);
246246
s = (hi >> 10) & 1;
247247
j1 = (lo >> 13) & 1;
248248
j2 = (lo >> 11) & 1;
@@ -313,11 +313,11 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
313313
j2 = s ^ (i2 ^ 1);
314314
imm10 = (x >> 12) & 0x3ff;
315315
imm11 = (x >> 1) & 0x7ff;
316-
(*(uint16_t *)ptr) = (uint16_t) ((hi & 0xf800) |
317-
(s << 10) | imm10);
318-
(*(uint16_t *)(ptr+2)) = (uint16_t) ((lo & 0xc000) |
319-
(j1 << 13) | blx_bit | (j2 << 11) |
320-
imm11);
316+
write16le(ptr, (uint16_t) ((hi & 0xf800) |
317+
(s << 10) | imm10));
318+
write16le(ptr+2, (uint16_t) ((lo & 0xc000) |
319+
(j1 << 13) | blx_bit | (j2 << 11) |
320+
imm11));
321321
}
322322
return;
323323
case R_ARM_MOVT_ABS:
@@ -422,7 +422,7 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
422422
return;
423423
case R_ARM_GLOB_DAT:
424424
case R_ARM_JUMP_SLOT:
425-
*(addr_t *)ptr = val;
425+
write32le(ptr, val);
426426
return;
427427
case R_ARM_NONE:
428428
/* Nothing to do. Normally used to indicate a dependency

‎include/stddef.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ typedef union { long long __ll; long double __ld; } max_align_t;
1717
#endif
1818

1919
#undef offsetof
20-
#define offsetof(type, field) ((size_t)&((type *)0)->field)
20+
#define offsetof(type, field) __builtin_offsetof(type, field)
2121

2222
#if defined __i386__ || defined __x86_64__
2323
void *alloca(size_t size);

‎riscv64-gen.c

Lines changed: 44 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,10 @@
3535
#include "tcc.h"
3636
#include <assert.h>
3737

38+
#define UPPER(x) (((unsigned)(x) + 0x800u) & 0xfffff000)
39+
#define SIGN7(x) ((((x) & 0xff) ^ 0x80) - 0x80)
40+
#define SIGN11(x) ((((x) & 0xfff) ^ 0x800) - 0x800)
41+
3842
ST_DATA const char * const target_machine_defs =
3943
"__riscv\0"
4044
"__riscv_xlen 64\0"
@@ -163,7 +167,7 @@ ST_FUNC void gsym_addr(int t_, int a_)
163167
}
164168
}
165169

166-
static int load_symofs(int r, SValue *sv, int forstore)
170+
static int load_symofs(int r, SValue *sv, int forstore, int *new_fc)
167171
{
168172
int rr, doload = 0, large_addend = 0;
169173
int fc = sv->c.i, v = sv->r & VT_VALMASK;
@@ -173,7 +177,7 @@ static int load_symofs(int r, SValue *sv, int forstore)
173177
if (sv->sym->type.t & VT_STATIC) { // XXX do this per linker relax
174178
greloca(cur_text_section, sv->sym, ind,
175179
R_RISCV_PCREL_HI20, sv->c.i);
176-
sv->c.i = 0;
180+
*new_fc = 0;
177181
} else {
178182
if (((unsigned)fc + (1 << 11)) >> 12){
179183
large_addend = 1;
@@ -193,9 +197,9 @@ static int load_symofs(int r, SValue *sv, int forstore)
193197
if (doload) {
194198
EI(0x03, 3, rr, rr, 0); // ld RR, 0(RR)
195199
if (large_addend) {
196-
o(0x37 | (6 << 7) | ((0x800 + fc) & 0xfffff000)); //lui t1, high(fc)
200+
o(0x37 | (6 << 7) | UPPER(fc)); //lui t1, high(fc)
197201
ER(0x33, 0, rr, rr, 6, 0); // add RR, RR, t1
198-
sv->c.i = fc << 20 >> 20;
202+
*new_fc = SIGN11(fc);
199203
}
200204
}
201205
} else if (v == VT_LOCAL || v == VT_LLOCAL) {
@@ -204,9 +208,9 @@ static int load_symofs(int r, SValue *sv, int forstore)
204208
tcc_error("unimp: store(giant local off) (0x%lx)", (long)sv->c.i);
205209
if (((unsigned)fc + (1 << 11)) >> 12) {
206210
rr = is_ireg(r) ? ireg(r) : 5; // t0
207-
o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
211+
o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc)
208212
ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0
209-
sv->c.i = fc << 20 >> 20;
213+
*new_fc = SIGN11(fc);
210214
}
211215
} else
212216
tcc_error("uhh");
@@ -217,13 +221,12 @@ static void load_large_constant(int rr, int fc, uint32_t pi)
217221
{
218222
if (fc < 0)
219223
pi++;
220-
o(0x37 | (rr << 7) | (((pi + 0x800) & 0xfffff000))); // lui RR, up(up(fc))
221-
EI(0x13, 0, rr, rr, (int)pi << 20 >> 20); // addi RR, RR, lo(up(fc))
224+
o(0x37 | (rr << 7) | UPPER(pi)); // lui RR, up(up(fc))
225+
EI(0x13, 0, rr, rr, SIGN11(pi)); // addi RR, RR, lo(up(fc))
222226
EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
223-
EI(0x13, 0, rr, rr, (fc + (1 << 19)) >> 20); // addi RR, RR, up(lo(fc))
227+
EI(0x13, 0, rr, rr, SIGN11(((unsigned)fc + (1 << 19)) >> 20)); // addi RR, RR, up(lo(fc))
224228
EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
225-
fc = (fc + (1 << 7)) << 12 >> 12;
226-
EI(0x13, 0, rr, rr, fc >> 8); // addi RR, RR, lo1(lo(fc))
229+
EI(0x13, 0, rr, rr, SIGN11(((unsigned)fc + (1 << 7)) >> 8)); // addi RR, RR, lo1(lo(fc))
227230
EI(0x13, 1, rr, rr, 8); // slli RR, RR, 8
228231
}
229232

@@ -233,7 +236,6 @@ ST_FUNC void load(int r, SValue *sv)
233236
int v = fr & VT_VALMASK;
234237
int rr = is_ireg(r) ? ireg(r) : freg(r);
235238
int fc = sv->c.i;
236-
uint64_t save_fc = sv->c.i;
237239
int bt = sv->type.t & VT_BTYPE;
238240
int align, size;
239241
if (fr & VT_LVAL) {
@@ -246,16 +248,14 @@ ST_FUNC void load(int r, SValue *sv)
246248
if (size < 4 && !is_float(sv->type.t) && (sv->type.t & VT_UNSIGNED))
247249
func3 |= 4;
248250
if (v == VT_LOCAL || (fr & VT_SYM)) {
249-
br = load_symofs(r, sv, 0);
250-
fc = sv->c.i;
251+
br = load_symofs(r, sv, 0, &fc);
251252
} else if (v < VT_CONST) {
252253
br = ireg(v);
253254
/*if (((unsigned)fc + (1 << 11)) >> 12)
254255
tcc_error("unimp: load(large addend) (0x%x)", fc);*/
255256
fc = 0; // XXX store ofs in LVAL(reg)
256257
} else if (v == VT_LLOCAL) {
257-
br = load_symofs(r, sv, 0);
258-
fc = sv->c.i;
258+
br = load_symofs(r, sv, 0, &fc);
259259
EI(0x03, 3, rr, br, fc); // ld RR, fc(BR)
260260
br = rr;
261261
fc = 0;
@@ -264,10 +264,10 @@ ST_FUNC void load(int r, SValue *sv)
264264
si >>= 32;
265265
if (si != 0) {
266266
load_large_constant(rr, fc, si);
267-
fc = fc << 24 >> 24;
267+
fc = SIGN7(fc);
268268
} else {
269-
o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
270-
fc = fc << 20 >> 20;
269+
o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc)
270+
fc = SIGN11(fc);
271271
}
272272
br = rr;
273273
} else {
@@ -278,18 +278,17 @@ ST_FUNC void load(int r, SValue *sv)
278278
int rb = 0, do32bit = 8, zext = 0;
279279
assert((!is_float(sv->type.t) && is_ireg(r)) || bt == VT_LDOUBLE);
280280
if (fr & VT_SYM) {
281-
rb = load_symofs(r, sv, 0);
282-
fc = sv->c.i;
281+
rb = load_symofs(r, sv, 0, &fc);
283282
do32bit = 0;
284283
}
285284
if (is_float(sv->type.t) && bt != VT_LDOUBLE)
286285
tcc_error("unimp: load(float)");
287-
if (fc != sv->c.i) {
286+
if (do32bit && fc != sv->c.i) {
288287
int64_t si = sv->c.i;
289288
si >>= 32;
290289
if (si != 0) {
291290
load_large_constant(rr, fc, si);
292-
fc = fc << 24 >> 24;
291+
fc = SIGN7(fc);
293292
rb = rr;
294293
do32bit = 0;
295294
} else if (bt == VT_LLONG) {
@@ -299,17 +298,16 @@ ST_FUNC void load(int r, SValue *sv)
299298
}
300299
}
301300
if (((unsigned)fc + (1 << 11)) >> 12)
302-
o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)), rb = rr; //lui RR, upper(fc)
301+
o(0x37 | (rr << 7) | UPPER(fc)), rb = rr; //lui RR, upper(fc)
303302
if (fc || (rr != rb) || do32bit || (fr & VT_SYM))
304-
EI(0x13 | do32bit, 0, rr, rb, fc << 20 >> 20); // addi[w] R, x0|R, FC
303+
EI(0x13 | do32bit, 0, rr, rb, SIGN11(fc)); // addi[w] R, x0|R, FC
305304
if (zext) {
306305
EI(0x13, 1, rr, rr, 32); // slli RR, RR, 32
307306
EI(0x13, 5, rr, rr, 32); // srli RR, RR, 32
308307
}
309308
} else if (v == VT_LOCAL) {
310-
int br = load_symofs(r, sv, 0);
309+
int br = load_symofs(r, sv, 0, &fc);
311310
assert(is_ireg(r));
312-
fc = sv->c.i;
313311
EI(0x13, 0, rr, br, fc); // addi R, s0, FC
314312
} else if (v < VT_CONST) { /* reg-reg */
315313
//assert(!fc); XXX support offseted regs
@@ -324,7 +322,7 @@ ST_FUNC void load(int r, SValue *sv)
324322
func7 |= 1;
325323
assert(size == 4 || size == 8);
326324
o(0x53 | (rr << 7) | ((is_freg(v) ? freg(v) : ireg(v)) << 15)
327-
| (func7 << 25)); // fmv.{w.x, x.w, d.x, x.d} RR, VR
325+
| ((unsigned)func7 << 25)); // fmv.{w.x, x.w, d.x, x.d} RR, VR
328326
}
329327
} else if (v == VT_CMP) {
330328
int op = vtop->cmp_op;
@@ -371,15 +369,13 @@ ST_FUNC void load(int r, SValue *sv)
371369
EI(0x13, 0, rr, 0, t ^ 1); // addi RR, x0, !t
372370
} else
373371
tcc_error("unimp: load(non-const)");
374-
sv->c.i = save_fc;
375372
}
376373

377374
ST_FUNC void store(int r, SValue *sv)
378375
{
379376
int fr = sv->r & VT_VALMASK;
380377
int rr = is_ireg(r) ? ireg(r) : freg(r), ptrreg;
381378
int fc = sv->c.i;
382-
uint64_t save_fc = sv->c.i;
383379
int bt = sv->type.t & VT_BTYPE;
384380
int align, size = type_size(&sv->type, &align);
385381
assert(!is_float(bt) || is_freg(r) || bt == VT_LDOUBLE);
@@ -393,8 +389,7 @@ ST_FUNC void store(int r, SValue *sv)
393389
tcc_error("unimp: large sized store");
394390
assert(sv->r & VT_LVAL);
395391
if (fr == VT_LOCAL || (sv->r & VT_SYM)) {
396-
ptrreg = load_symofs(-1, sv, 1);
397-
fc = sv->c.i;
392+
ptrreg = load_symofs(-1, sv, 1, &fc);
398393
} else if (fr < VT_CONST) {
399394
ptrreg = ireg(fr);
400395
/*if (((unsigned)fc + (1 << 11)) >> 12)
@@ -406,17 +401,16 @@ ST_FUNC void store(int r, SValue *sv)
406401
si >>= 32;
407402
if (si != 0) {
408403
load_large_constant(ptrreg, fc, si);
409-
fc = fc << 24 >> 24;
404+
fc = SIGN7(fc);
410405
} else {
411-
o(0x37 | (ptrreg << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
412-
fc = fc << 20 >> 20;
406+
o(0x37 | (ptrreg << 7) | UPPER(fc)); //lui RR, upper(fc)
407+
fc = SIGN11(fc);
413408
}
414409
} else
415410
tcc_error("implement me: %s(!local)", __FUNCTION__);
416411
ES(is_freg(r) ? 0x27 : 0x23, // fs... | s...
417412
size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3, // ... [wd] | [bhwd]
418413
ptrreg, rr, fc); // RR, fc(base)
419-
sv->c.i = save_fc;
420414
}
421415

422416
static void gcall_or_jmp(int docall)
@@ -634,11 +628,8 @@ ST_FUNC void gfunc_call(int nb_args)
634628

635629
if (stack_add) {
636630
if (stack_add >= 0x800) {
637-
unsigned int bit11 = (((unsigned int)-stack_add) >> 11) & 1;
638-
o(0x37 | (5 << 7) |
639-
((-stack_add + (bit11 << 12)) & 0xfffff000)); //lui t0, upper(v)
640-
EI(0x13, 0, 5, 5, ((-stack_add & 0xfff) - bit11 * (1 << 12)));
641-
// addi t0, t0, lo(v)
631+
o(0x37 | (5 << 7) | UPPER(-stack_add)); //lui t0, upper(v)
632+
EI(0x13, 0, 5, 5, SIGN11(-stack_add)); // addi t0, t0, lo(v)
642633
ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
643634
}
644635
else
@@ -766,11 +757,8 @@ ST_FUNC void gfunc_call(int nb_args)
766757
vtop -= nb_args + 1;
767758
if (stack_add) {
768759
if (stack_add >= 0x800) {
769-
unsigned int bit11 = ((unsigned int)stack_add >> 11) & 1;
770-
o(0x37 | (5 << 7) |
771-
((stack_add + (bit11 << 12)) & 0xfffff000)); //lui t0, upper(v)
772-
EI(0x13, 0, 5, 5, (stack_add & 0xfff) - bit11 * (1 << 12));
773-
// addi t0, t0, lo(v)
760+
o(0x37 | (5 << 7) | UPPER(stack_add)); //lui t0, upper(v)
761+
EI(0x13, 0, 5, 5, SIGN11(stack_add)); // addi t0, t0, lo(v)
774762
ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
775763
}
776764
else
@@ -911,8 +899,8 @@ ST_FUNC void gfunc_epilog(void)
911899

912900
if (v >= (1 << 11)) {
913901
d = 16;
914-
o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
915-
EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
902+
o(0x37 | (5 << 7) | UPPER(v-16)); //lui t0, upper(v)
903+
EI(0x13, 0, 5, 5, SIGN11(v-16)); // addi t0, t0, lo(v)
916904
ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
917905
}
918906
EI(0x03, 3, 1, 2, d - 8 - num_va_regs * 8); // ld ra, v-8(sp)
@@ -922,8 +910,8 @@ ST_FUNC void gfunc_epilog(void)
922910
large_ofs_ind = ind;
923911
if (v >= (1 << 11)) {
924912
EI(0x13, 0, 8, 2, d - num_va_regs * 8); // addi s0, sp, d
925-
o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
926-
EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
913+
o(0x37 | (5 << 7) | UPPER(v-16)); //lui t0, upper(v)
914+
EI(0x13, 0, 5, 5, SIGN11(v-16)); // addi t0, t0, lo(v)
927915
ER(0x33, 0, 2, 2, 5, 0x20); // sub sp, sp, t0
928916
gjmp_addr(func_sub_sp_offset + 5*4);
929917
}
@@ -972,8 +960,8 @@ ST_FUNC void gjmp_addr(int a)
972960
{
973961
uint32_t r = a - ind, imm;
974962
if ((r + (1 << 21)) & ~((1U << 22) - 2)) {
975-
o(0x17 | (5 << 7) | (((r + 0x800) & 0xfffff000))); // lui RR, up(r)
976-
r = (int)r << 20 >> 20;
963+
o(0x17 | (5 << 7) | UPPER(r)); // lui RR, up(r)
964+
r = SIGN11(r);
977965
EI(0x67, 0, 0, 5, r); // jalr x0, r(t0)
978966
} else {
979967
imm = (((r >> 12) & 0xff) << 12)
@@ -1394,9 +1382,9 @@ ST_FUNC void ggoto(void)
13941382
ST_FUNC void gen_vla_sp_save(int addr)
13951383
{
13961384
if (((unsigned)addr + (1 << 11)) >> 12) {
1397-
o(0x37 | (5 << 7) | ((0x800 + addr) & 0xfffff000)); //lui t0,upper(addr)
1385+
o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
13981386
ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
1399-
ES(0x23, 3, 5, 2, (int)addr << 20 >> 20); // sd sp, fc(t0)
1387+
ES(0x23, 3, 5, 2, SIGN11(addr)); // sd sp, fc(t0)
14001388
}
14011389
else
14021390
ES(0x23, 3, 8, 2, addr); // sd sp, fc(s0)
@@ -1405,9 +1393,9 @@ ST_FUNC void gen_vla_sp_save(int addr)
14051393
ST_FUNC void gen_vla_sp_restore(int addr)
14061394
{
14071395
if (((unsigned)addr + (1 << 11)) >> 12) {
1408-
o(0x37 | (5 << 7) | ((0x800 + addr) & 0xfffff000)); //lui t0,upper(addr)
1396+
o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
14091397
ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
1410-
EI(0x03, 3, 2, 5, (int)addr << 20 >> 20); // ld sp, fc(t0)
1398+
EI(0x03, 3, 2, 5, SIGN11(addr)); // ld sp, fc(t0)
14111399
}
14121400
else
14131401
EI(0x03, 3, 2, 8, addr); // ld sp, fc(s0)

‎riscv64-link.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -347,7 +347,7 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
347347
*ptr = (*ptr & ~0xff) | (val & 0xff);
348348
return;
349349
case R_RISCV_SET16:
350-
write16le(ptr, (read16le(ptr) & ~0xffff) | (val & 0xffff));
350+
write16le(ptr, val);
351351
return;
352352
case R_RISCV_SUB6:
353353
*ptr = (*ptr & ~0x3f) | ((*ptr - val) & 0x3f);

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