soc: ti: Use common peripheral startup delay config for mspm0 and mspm33

Consolidate MSPM33_PERIPH_STARTUP_DELAY and MSPM0_PERIPH_STARTUP_DELAY
into a single MSP_PERIPH_STARTUP_DELAY option. Update all affected
drivers to use the common configuration.

Signed-off-by: Aman Lachhiramka <[email protected]>

Author: Aman-Lachhiramka-ti

drivers/adc/adc_msp_hsadc.c

@@ -173,8 +173,8 @@ static int adc_msp_hsadc_config_vref(int ref_internal)
 	if (init_vref) {
 		/* Initialize VREF module */
 		DL_VREF_reset(VREF);
-		DL_VREF_enablePower(VREF);
-		delay_cycles(CONFIG_MSPM33_PERIPH_STARTUP_DELAY);
+	DL_VREF_enablePower(VREF);
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 
 		/* Configure VREF clock */
 		DL_VREF_ClockConfig vref_clk_config = {.clockSel = DL_VREF_CLOCK_BUSCLK,
@@ -214,7 +214,7 @@ static int adc_msp_hsadc_init(const struct device *dev)
 	DL_HSADC_reset((hsadc_ADC_LITE_REGS_Regs *)config->config_base);
 	DL_HSADC_enablePower((hsadc_ADC_LITE_REGS_Regs *)config->config_base);
 
-	delay_cycles(CONFIG_MSPM33_PERIPH_STARTUP_DELAY); // wait for power to stabilize
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY); // wait for power to stabilize
 
 	/* Configure clock */
 	DL_HSADC_setClockDivideRatio((hsadc_ADC_LITE_REGS_Regs *)config->config_base,

drivers/counter/counter_msp_timer.c

@@ -17,14 +17,6 @@
 #include <ti/driverlib/dl_timerg.h>
 #include <ti/driverlib/dl_timer.h>
 
-/**
- * @brief Platform detection macros
- */
-#if defined(CONFIG_SOC_SERIES_MSPM0G) || defined(CONFIG_SOC_SERIES_MSPM0L)
-#define MSP_M0 1
-#elif defined(CONFIG_SOC_SERIES_MSPM33C)
-#define MSP_M33 1
-#endif
 
 LOG_MODULE_REGISTER(msp_counter, CONFIG_COUNTER_LOG_LEVEL);
 
@@ -210,11 +202,7 @@ static int counter_msp_init(const struct device *dev)
 		DL_Timer_enablePower(config->base);
 	}
 
-#if defined(MSP_M0)
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
-#elif defined(MSP_M33)
-	delay_cycles(CONFIG_MSPM33_PERIPH_STARTUP_DELAY);
-#endif
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 
 	DL_Timer_setClockConfig(config->base, (DL_Timer_ClockConfig *)&config->clk_config);
 	DL_Timer_initTimerMode(config->base, &tim_config);

drivers/i2c/i2c_mspm0.c

@@ -192,7 +192,7 @@ static int i2c_mspm0_init(const struct device *dev)
 	/* Init power */
 	DL_I2C_reset(config->base);
 	DL_I2C_enablePower(config->base);
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 	DL_I2C_resetControllerTransfer(config->base);
 #ifdef CONFIG_I2C_TARGET
 	/* Workaround for errata I2C_ERR_04 */
@@ -234,7 +234,7 @@ static int i2c_mspm0_reset_peripheral_controller(const struct device *dev)
 	DL_I2C_disablePower(config->base);
 
 	DL_I2C_enablePower(config->base);
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 
 	DL_I2C_disableTargetWakeup(config->base);
 
@@ -525,7 +525,7 @@ static int i2c_mspm0_reset_peripheral_target(const struct device *dev)
 	DL_I2C_disablePower(config->base);
 
 	DL_I2C_enablePower(config->base);
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 
 	DL_I2C_disableTargetWakeup(config->base);
 

drivers/pwm/pwm_mspm0.c

@@ -350,7 +350,7 @@ static int pwm_mspm0_init(const struct device *dev)
 		DL_Timer_enablePower(config->base);
 	}
 
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 	DL_Timer_setClockConfig(config->base, (DL_Timer_ClockConfig *)&config->clk_config);
 	if (config->is_capture) {
 #ifdef CONFIG_PWM_CAPTURE

drivers/serial/uart_msp.c

@@ -65,11 +65,7 @@ static int uart_msp_init(const struct device *dev)
 	DL_UART_Main_reset(config->regs);
 	DL_UART_Main_enablePower(config->regs);
 
-#if defined(CONFIG_SOC_FAMILY_MSPM0)
-	delay_cycles(CONFIG_MSPM0_PERIPH_STARTUP_DELAY);
-#elif defined(CONFIG_SOC_FAMILY_MSPM33)
-	delay_cycles(CONFIG_MSPM33_PERIPH_STARTUP_DELAY);
-#endif
+	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
 	/* Init UART pins */
 	ret = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT);
 	if (ret < 0) {

soc/ti/mspm0/Kconfig

@@ -11,7 +11,7 @@ rsource "*/Kconfig"
 # clock cycles before accessing the peripheral's memory-mapped registers.
 # ULPCLK will either be equivalent or half of the main MCLK and CPUCLK,
 # yielding the delay time of 8 cycles
-config MSPM0_PERIPH_STARTUP_DELAY
+config MSP_PERIPH_STARTUP_DELAY
 	int
 	default 8
 

soc/ti/mspm33/Kconfig

@@ -7,12 +7,7 @@ if SOC_FAMILY_TI_MSPM33
 
 rsource "*/Kconfig"
 
-# Per TRM Section 2.2.7 Peripheral Power Enable Control: wait at least 4 ULPCLK
-# clock cycles before accessing the peripheral's memory-mapped registers.
-# ULPCLK will either be equivalent or half of the main MCLK and CPUCLK,
-# yielding the delay time of 8 cycles
-# Same parameter as of MSPM0
-config MSPM33_PERIPH_STARTUP_DELAY
+config MSP_PERIPH_STARTUP_DELAY
 	int
 	default 8