From f16c47d28b1d0b075f776e6f8fac8ada5c77b1f4 Mon Sep 17 00:00:00 2001 From: SMFSW Date: Wed, 12 Apr 2023 19:29:11 +0200 Subject: [PATCH] * GPIO_in & Logic_in: Internal init fix to be in release state (no spurious callback triggered after init) --- Logic_in.c | 10 +++------- ReleaseNotes.md | 1 + 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/Logic_in.c b/Logic_in.c index ed35e87..920f9c5 100644 --- a/Logic_in.c +++ b/Logic_in.c @@ -12,20 +12,16 @@ void NONNULLX__(1) Logic_in_init( Logic_in * const in, GPIO_PinState (*getter)(c uint32_t * const addr, const uint32_t pos, const GPIO_PinState polarity, const uint16_t filter, void (*onSet)(const Logic_in * const), void (*onReset)(const Logic_in * const), const bool repeat) { - /* Check the parameters */ - //assert_param(pos < 32); // Would raise an assert error in case of GPIO pin - in->cfg.get = getter; in->cfg.LOGx = addr; in->cfg.LOG_Pos = pos; - in->cfg.polarity = polarity; + in->cfg.polarity = polarity & 1U; // Ensuring polarity is boolean value in->cfg.filt = filter; in->cfg.onSet = onSet; in->cfg.onReset = onReset; in->cfg.repeat = repeat; - - in->in = polarity; - in->mem = polarity; + in->in = false; + in->mem = false; in->edge = NoEdge; in->hIn = 0; } diff --git a/ReleaseNotes.md b/ReleaseNotes.md index 7c450e9..e009937 100755 --- a/ReleaseNotes.md +++ b/ReleaseNotes.md @@ -22,6 +22,7 @@ SOFTWARE. ## v1.5 +* GPIO_in & Logic_in: Internal init fix to be in release state (no spurious callback triggered after init) * TIM_ex: fix possible div by 0 * ADC_ex: Fixes for compensation when calibrated values differ from VDD_VALUE * ADC_ex: Added customizable pre-processing symbols to allow better ADC configuration when needed (ADC_RESOLUTION, Def_VAlim, Def_VCal, Def_VBatFactor)