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Single_Cycle_RISC_Processor.map.rpt
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Analysis & Elaboration report for Single_Cycle_RISC_Processor
Sun Dec 15 22:49:55 2024
Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Analysis & Elaboration Summary
3. Parallel Compilation
4. Parameter Settings for User Entity Instance: Top-level Entity: |processor_tb
5. Parameter Settings for User Entity Instance: control:control_inst
6. Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_alu_op
7. Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_opcode
8. Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_funct7
9. Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_funct3
10. Parameter Settings for User Entity Instance: pc:pc_inst
11. Parameter Settings for User Entity Instance: adder:adder_inst1
12. Parameter Settings for User Entity Instance: adder:adder_inst2
13. Parameter Settings for User Entity Instance: imem:imem_inst
14. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_IF_ID_instr
15. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_IF_ID_inst_pc
16. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_IF_ID_inst_pc_4
17. Parameter Settings for User Entity Instance: register_file:register_file_inst
18. Parameter Settings for User Entity Instance: extend:extend_inst
19. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_instr
20. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_ID_EX_inst_pc
21. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_read_data_1
22. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_read_data_2
23. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_imm_ext
24. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_result_src
25. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_mem_write
26. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_alu_src
27. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_reg_write
28. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_branch
29. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_ID_EX_inst_pc_4
30. Parameter Settings for User Entity Instance: alu:alu_inst
31. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_instr
32. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_pc_target
33. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_alu_result
34. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_zero
35. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_read_data_2
36. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_result_src
37. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_mem_write
38. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_reg_write
39. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_branch
40. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_EX_MEM_inst_pc_4
41. Parameter Settings for User Entity Instance: data_memory:data_memory_inst
42. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_instr
43. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_read_data
44. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_alu_result
45. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_result_src
46. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_reg_write
47. Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_MEM_WB_inst_pc_4
48. Analysis & Elaboration Settings
49. Port Connectivity Checks: "pipeline_register:pipeline_register_inst_MEM_WB_instr"
50. Port Connectivity Checks: "pipeline_register:pipeline_register_inst_EX_MEM_pc_target"
51. Port Connectivity Checks: "register_file:register_file_inst"
52. Port Connectivity Checks: "imem:imem_inst"
53. Port Connectivity Checks: "adder:adder_inst2"
54. Port Connectivity Checks: "adder:adder_inst1"
55. Port Connectivity Checks: "pc:pc_inst"
56. Port Connectivity Checks: "control:control_inst|pipeline_register:pipeline_register_inst_funct7"
57. Port Connectivity Checks: "control:control_inst|control_main_decoder:control_main_decoder_inst"
58. Analysis & Elaboration Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+---------------------------------------------------------------------------------+
; Analysis & Elaboration Summary ;
+------------------------------------+--------------------------------------------+
; Analysis & Elaboration Status ; Successful - Sun Dec 15 22:49:55 2024 ;
; Quartus II 64-Bit Version ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name ; Single_Cycle_RISC_Processor ;
; Top-level Entity Name ; processor_tb ;
; Family ; Cyclone IV E ;
; Total logic elements ; N/A until Partition Merge ;
; Total combinational functions ; N/A until Partition Merge ;
; Dedicated logic registers ; N/A until Partition Merge ;
; Total registers ; N/A until Partition Merge ;
; Total pins ; N/A until Partition Merge ;
; Total virtual pins ; N/A until Partition Merge ;
; Total memory bits ; N/A until Partition Merge ;
; Embedded Multiplier 9-bit elements ; N/A until Partition Merge ;
; Total PLLs ; N/A until Partition Merge ;
+------------------------------------+--------------------------------------------+
Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation ;
+----------------------------+--------+
; Processors ; Number ;
+----------------------------+--------+
; Number detected on machine ; 8 ;
; Maximum allowed ; 1 ;
+----------------------------+--------+
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |processor_tb ;
+----------------+-------+-----------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------+
; BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: control:control_inst ;
+----------------+-------+------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------+
; INSTR_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_alu_op ;
+----------------+-------+------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------------------------+
; NUM_BITS ; 2 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_opcode ;
+----------------+-------+------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------------------------+
; NUM_BITS ; 7 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_funct7 ;
+----------------+-------+------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------------------------+
; NUM_BITS ; 7 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: control:control_inst|pipeline_register:pipeline_register_inst_funct3 ;
+----------------+-------+------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------------------------+
; NUM_BITS ; 3 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------+
; Parameter Settings for User Entity Instance: pc:pc_inst ;
+----------------+-------+--------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------+
; BUS_WIDTH ; 16 ; Signed Integer ;
+----------------+-------+--------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: adder:adder_inst1 ;
+----------------+-------+---------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------+
; BUS_WIDTH ; 16 ; Signed Integer ;
+----------------+-------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: adder:adder_inst2 ;
+----------------+-------+---------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------+
; BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------+
; Parameter Settings for User Entity Instance: imem:imem_inst ;
+----------------+-------+------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------+
; ADDR_BUS_WIDTH ; 16 ; Signed Integer ;
; DATA_BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_IF_ID_instr ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_IF_ID_inst_pc ;
+----------------+-------+-----------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_IF_ID_inst_pc_4 ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: register_file:register_file_inst ;
+----------------+-------+------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------+
; ADDR_BUS_WIDTH ; 5 ; Signed Integer ;
; DATA_BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: extend:extend_inst ;
+----------------+-------+----------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------------+
; DATA_BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_instr ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_ID_EX_inst_pc ;
+----------------+-------+-----------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_read_data_1 ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_read_data_2 ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_ID_EX_imm_ext ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_result_src ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------+
; NUM_BITS ; 2 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_mem_write ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_alu_src ;
+----------------+-------+----------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_reg_write ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_branch ;
+----------------+-------+---------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_ID_EX_inst_pc_4 ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------+
; Parameter Settings for User Entity Instance: alu:alu_inst ;
+----------------+-------+----------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------+
; BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_instr ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_pc_target ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_alu_result ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_zero ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_read_data_2 ;
+----------------+-------+---------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_result_src ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 2 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_mem_write ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_reg_write ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_EX_MEM_branch ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+----------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_EX_MEM_inst_pc_4 ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: data_memory:data_memory_inst ;
+----------------+-------+--------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------+
; ADDR_BUS_WIDTH ; 32 ; Signed Integer ;
; DATA_BUS_WIDTH ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_instr ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+---------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_read_data ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_alu_result ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 32 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_result_src ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------------+
; NUM_BITS ; 2 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_inst_MEM_WB_reg_write ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-------------------------------------------------------------------------------+
; NUM_BITS ; 1 ; Signed Integer ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pipeline_register:pipeline_register_MEM_WB_inst_pc_4 ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------------------------------------+
; NUM_BITS ; 16 ; Signed Integer ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Elaboration Settings ;
+----------------------------------------------------------------------------+--------------------+-----------------------------+
; Option ; Setting ; Default Value ;
+----------------------------------------------------------------------------+--------------------+-----------------------------+
; Device ; EP4CE115F29C7 ; ;
; Top-level entity name ; processor_tb ; Single_Cycle_RISC_Processor ;
; Family name ; Cyclone IV E ; Cyclone V ;
; Use smart compilation ; Off ; Off ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
; Enable compact report table ; Off ; Off ;
; Restructure Multiplexers ; Auto ; Auto ;
; Create Debugging Nodes for IP Cores ; Off ; Off ;
; Preserve fewer node names ; On ; On ;
; Disable OpenCore Plus hardware evaluation ; Off ; Off ;
; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
; State Machine Processing ; Auto ; Auto ;
; Safe State Machine ; Off ; Off ;
; Extract Verilog State Machines ; On ; On ;
; Extract VHDL State Machines ; On ; On ;
; Ignore Verilog initial constructs ; Off ; Off ;
; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
; Infer RAMs from Raw Logic ; On ; On ;
; Parallel Synthesis ; On ; On ;
; DSP Block Balancing ; Auto ; Auto ;
; NOT Gate Push-Back ; On ; On ;
; Power-Up Don't Care ; On ; On ;
; Remove Redundant Logic Cells ; Off ; Off ;
; Remove Duplicate Registers ; On ; On ;
; Ignore CARRY Buffers ; Off ; Off ;
; Ignore CASCADE Buffers ; Off ; Off ;
; Ignore GLOBAL Buffers ; Off ; Off ;
; Ignore ROW GLOBAL Buffers ; Off ; Off ;
; Ignore LCELL Buffers ; Off ; Off ;
; Ignore SOFT Buffers ; On ; On ;
; Limit AHDL Integers to 32 Bits ; Off ; Off ;
; Optimization Technique ; Balanced ; Balanced ;
; Carry Chain Length ; 70 ; 70 ;
; Auto Carry Chains ; On ; On ;
; Auto Open-Drain Pins ; On ; On ;
; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
; Auto ROM Replacement ; On ; On ;
; Auto RAM Replacement ; On ; On ;
; Auto DSP Block Replacement ; On ; On ;
; Auto Shift Register Replacement ; Auto ; Auto ;
; Allow Shift Register Merging across Hierarchies ; Auto ; Auto ;
; Auto Clock Enable Replacement ; On ; On ;
; Strict RAM Replacement ; Off ; Off ;
; Allow Synchronous Control Signals ; On ; On ;
; Force Use of Synchronous Clear Signals ; Off ; Off ;
; Auto RAM Block Balancing ; On ; On ;
; Auto RAM to Logic Cell Conversion ; Off ; Off ;
; Auto Resource Sharing ; Off ; Off ;
; Allow Any RAM Size For Recognition ; Off ; Off ;
; Allow Any ROM Size For Recognition ; Off ; Off ;
; Allow Any Shift Register Size For Recognition ; Off ; Off ;
; Use LogicLock Constraints during Resource Balancing ; On ; On ;
; Ignore translate_off and synthesis_off directives ; Off ; Off ;
; Timing-Driven Synthesis ; On ; On ;
; Report Parameter Settings ; On ; On ;
; Report Source Assignments ; On ; On ;
; Report Connectivity Checks ; On ; On ;
; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
; Synchronization Register Chain Length ; 2 ; 2 ;
; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
; HDL message level ; Level2 ; Level2 ;
; Suppress Register Optimization Related Messages ; Off ; Off ;
; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
; Number of Swept Nodes Reported in Synthesis Report ; 5000 ; 5000 ;
; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
; Clock MUX Protection ; On ; On ;
; Auto Gated Clock Conversion ; Off ; Off ;
; Block Design Naming ; Auto ; Auto ;
; SDC constraint protection ; Off ; Off ;
; Synthesis Effort ; Auto ; Auto ;
; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
; Pre-Mapping Resynthesis Optimization ; Off ; Off ;
; Analysis & Synthesis Message Level ; Medium ; Medium ;
; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
; Resource Aware Inference For Block RAM ; On ; On ;
; Synthesis Seed ; 1 ; 1 ;
+----------------------------------------------------------------------------+--------------------+-----------------------------+
+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pipeline_register:pipeline_register_inst_MEM_WB_instr" ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; dout[31..12] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; dout[6..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pipeline_register:pipeline_register_inst_EX_MEM_pc_target" ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; dout[31..16] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "register_file:register_file_inst" ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------+
; LEDG ; Output ; Warning ; Output or bidir port (8 bits) is wider than the port expression (1 bits) it drives; bit(s) "LEDG[7..1]" have no fanouts ;
; LEDG ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; dout ; Output ; Warning ; Output or bidir port (8 bits) is wider than the port expression (1 bits) it drives; bit(s) "dout[7..1]" have no fanouts ;
; dout ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; Ready_Byte ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "imem:imem_inst" ;
+--------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+--------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
; instIn ; Input ; Warning ; Input port expression (1 bits) is smaller than the input port (8 bits) it drives. Extra input bit(s) "instIn[7..1]" will be connected to GND. ;
; LEDR ; Output ; Warning ; Output or bidir port (8 bits) is wider than the port expression (1 bits) it drives; bit(s) "LEDR[7..1]" have no fanouts ;
; LEDR ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------+
; Port Connectivity Checks: "adder:adder_inst2" ;
+-----------+-------+----------+----------------+
; Port ; Type ; Severity ; Details ;
+-----------+-------+----------+----------------+
; a[31..16] ; Input ; Info ; Stuck at GND ;
+-----------+-------+----------+----------------+
+-----------------------------------------------+
; Port Connectivity Checks: "adder:adder_inst1" ;
+----------+-------+----------+-----------------+
; Port ; Type ; Severity ; Details ;
+----------+-------+----------+-----------------+
; b[15..3] ; Input ; Info ; Stuck at GND ;
; b[1..0] ; Input ; Info ; Stuck at GND ;
; b[2] ; Input ; Info ; Stuck at VCC ;
+----------+-------+----------+-----------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pc:pc_inst" ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; pc_next ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (16 bits) it drives. The 16 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "control:control_inst|pipeline_register:pipeline_register_inst_funct7" ;
+------------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------------+--------+----------+-------------------------------------------------------------------------------------+
; dout[4..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; dout[6] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------+--------+----------+-------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "control:control_inst|control_main_decoder:control_main_decoder_inst" ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type ; Severity ; Details ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------+--------+----------+-------------------------------------------------------------------------------------+
+---------------------------------+
; Analysis & Elaboration Messages ;
+---------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit Analysis & Elaboration
Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
Info: Processing started: Sun Dec 15 22:49:54 2024
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Single_Cycle_RISC_Processor -c Single_Cycle_RISC_Processor --analysis_and_elaboration
Warning (20028): Parallel compilation is not licensed and has been disabled
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/pipeline_register.v
Info (12023): Found entity 1: pipeline_register
Info (12021): Found 1 design units, including 1 entities, in source file uart_source_files/transmitter.v
Info (12023): Found entity 1: transmitter
Info (12021): Found 1 design units, including 1 entities, in source file uart_source_files/receiver.v
Info (12023): Found entity 1: receiver
Info (12021): Found 1 design units, including 1 entities, in source file uart_source_files/buadrate.v
Info (12023): Found entity 1: baudrate
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/imem.v
Info (12023): Found entity 1: imem
Warning (10275): Verilog HDL Module Instantiation warning at Single_Cycle_RISC_Processor.v(69): ignored dangling comma in List of Port Connections
Info (12021): Found 1 design units, including 1 entities, in source file single_cycle_risc_processor.v
Info (12023): Found entity 1: Single_Cycle_RISC_Processor
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/register_file.v
Info (12023): Found entity 1: register_file
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/processor_tb.v
Info (12023): Found entity 1: processor_tb
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/processor.v
Info (12023): Found entity 1: processor
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/pc_tb.v
Info (12023): Found entity 1: pc_tb
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/pc.v
Info (12023): Found entity 1: pc
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/mux.v
Info (12023): Found entity 1: mux_2to1
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/extend.v
Info (12023): Found entity 1: extend
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/datapath.sv
Info (12023): Found entity 1: datapath
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/data_memory.v
Info (12023): Found entity 1: data_memory
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/control_main_decoder.v
Info (12023): Found entity 1: control_main_decoder
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/control_alu_decoder.v
Info (12023): Found entity 1: control_alu_decoder
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/control.v
Info (12023): Found entity 1: control
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/aludec.sv
Info (12023): Found entity 1: aludec
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/alu.v
Info (12023): Found entity 1: alu
Info (12021): Found 1 design units, including 1 entities, in source file processor_source_files/adder.sv
Info (12023): Found entity 1: adder
Warning (10236): Verilog HDL Implicit Net warning at Single_Cycle_RISC_Processor.v(61): created implicit net for "Tx_busy"
Warning (10236): Verilog HDL Implicit Net warning at Single_Cycle_RISC_Processor.v(63): created implicit net for "Ready_Byte"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(110): created implicit net for "rst"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(134): created implicit net for "instIn"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(135): created implicit net for "enable"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(136): created implicit net for "LEDR"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(171): created implicit net for "LEDG"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(173): created implicit net for "clk_50M"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(174): created implicit net for "en"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(175): created implicit net for "Tx_busy"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(176): created implicit net for "dout"
Warning (10236): Verilog HDL Implicit Net warning at processor_tb.v(177): created implicit net for "Ready_Byte"
Info (12127): Elaborating entity "processor_tb" for the top level hierarchy
Warning (10755): Verilog HDL warning at processor_tb.v(12): assignments to clk create a combinational loop
Info (12128): Elaborating entity "control" for hierarchy "control:control_inst"
Info (12128): Elaborating entity "control_main_decoder" for hierarchy "control:control_inst|control_main_decoder:control_main_decoder_inst"
Info (12128): Elaborating entity "pipeline_register" for hierarchy "control:control_inst|pipeline_register:pipeline_register_inst_alu_op"
Info (12128): Elaborating entity "pipeline_register" for hierarchy "control:control_inst|pipeline_register:pipeline_register_inst_opcode"
Info (12128): Elaborating entity "pipeline_register" for hierarchy "control:control_inst|pipeline_register:pipeline_register_inst_funct3"
Info (12128): Elaborating entity "control_alu_decoder" for hierarchy "control:control_inst|control_alu_decoder:control_alu_decoder_inst"
Info (12128): Elaborating entity "pc" for hierarchy "pc:pc_inst"
Info (12128): Elaborating entity "adder" for hierarchy "adder:adder_inst1"
Info (12128): Elaborating entity "adder" for hierarchy "adder:adder_inst2"
Info (12128): Elaborating entity "imem" for hierarchy "imem:imem_inst"
Warning (10230): Verilog HDL assignment warning at imem.v(88): truncated value with size 32 to match size of target (7)
Info (12128): Elaborating entity "pipeline_register" for hierarchy "pipeline_register:pipeline_register_inst_IF_ID_instr"
Info (12128): Elaborating entity "pipeline_register" for hierarchy "pipeline_register:pipeline_register_IF_ID_inst_pc"
Info (12128): Elaborating entity "register_file" for hierarchy "register_file:register_file_inst"
Warning (10230): Verilog HDL assignment warning at register_file.v(88): truncated value with size 32 to match size of target (8)
Warning (10230): Verilog HDL assignment warning at register_file.v(184): truncated value with size 32 to match size of target (2)
Warning (10230): Verilog HDL assignment warning at register_file.v(188): truncated value with size 32 to match size of target (5)
Info (10264): Verilog HDL Case Statement information at register_file.v(161): all case item expressions in this case statement are onehot
Info (12128): Elaborating entity "extend" for hierarchy "extend:extend_inst"
Info (12128): Elaborating entity "pipeline_register" for hierarchy "pipeline_register:pipeline_register_inst_mem_write"
Info (12128): Elaborating entity "alu" for hierarchy "alu:alu_inst"
Warning (10240): Verilog HDL Always Construct warning at alu.v(13): inferring latch(es) for variable "zero", which holds its previous value in one or more paths through the always construct
Info (10041): Inferred latch for "zero" at alu.v(13)
Info (12128): Elaborating entity "data_memory" for hierarchy "data_memory:data_memory_inst"
Warning (12011): Net is missing source, defaulting to GND
Warning (12110): Net "rst" is missing source, defaulting to GND
Warning (12011): Net is missing source, defaulting to GND
Warning (12110): Net "rst" is missing source, defaulting to GND
Warning (12110): Net "clk" is missing source, defaulting to GND
Warning (12241): 3 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info: Quartus II 64-Bit Analysis & Elaboration was successful. 0 errors, 26 warnings
Info: Peak virtual memory: 4618 megabytes
Info: Processing ended: Sun Dec 15 22:49:55 2024
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01