Update reference_design.md #3428
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these stm32h7 boards has 1mb ram, not 2mb
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hamishwillee
reviewed
Nov 6, 2024
| @@ -18,7 +18,7 @@ FMU generations 1-3 were designed as open hardware, while FMU generations 4 and | |||
| - FMUv4: Pixracer \(STM32F427, 168 MHz, 256 KB RAM, 2 MB flash, [pinout](https://docs.google.com/spreadsheets/d/1raRRouNsveQz8cj-EneWG6iW0dqGfRAifI91I2Sr5E0/edit#gid=1585075739)\) | |||
| - FMUv4 PRO: Drotek Pixhawk 3 PRO \(STM32F469, 180 MHz, 384 KB RAM, 2 MB flash, [pinout](https://docs.google.com/spreadsheets/d/1raRRouNsveQz8cj-EneWG6iW0dqGfRAifI91I2Sr5E0/edit#gid=1585075739)\) | |||
| - FMUv5: Holybro Pixhawk 4 \(STM32F765, 216 MHz, 512 KB RAM, 2 MB flash, [pinout](https://docs.google.com/spreadsheets/d/1-n0__BYDedQrc_2NHqBenG1DNepAgnHpSGglke-QQwY/edit#gid=912976165)\) | |||
| - FMUv6: work in progress, final name TBD, variant 6s \(STM32H7, 400 MHz, 2 MB RAM, 2 MB flash\) and variant 6i \(i.MX RT1050, 600 MHz, 512 KB RAM, external flash\) | |||
| - FMUv6: work in progress, final name TBD, variant 6s \(STM32H7, 400 MHz, 1 MB RAM, 2 MB flash\) and variant 6i \(i.MX RT1050, 600 MHz, 512 KB RAM, external flash\) | |||
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Thanks @abisop
@mrpollo This change is correct.
However we now have 5x, 6, 6s, 6x, 6x-rt. Are the Holybro variants the reference for all of these? E.g. for 6x-RT is it https://docs.px4.io/main/en/flight_controller/pixhawk6x-rt.html ?
Would be good to add those too if you can confirm this info
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these stm32h7 boards has 1mb ram, not 2mb