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Update radxa-zero3-arducam-pivariety.dts
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raphaelscholle committed Sep 6, 2024
1 parent a862ceb commit 8a0c899
Showing 1 changed file with 100 additions and 125 deletions.
225 changes: 100 additions & 125 deletions arch/arm64/boot/dts/rockchip/overlays/radxa-zero3-arducam-pivariety.dts
Original file line number Diff line number Diff line change
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/ {
metadata {
title = "Enable Arducam Pivariety on Radxa Zero3";
title = "Enable Arducam Pivariety";
compatible = "radxa,zero3";
category = "camera";
exclusive = "csi2_dphy0";
description = "Enable Arducam Pivariety on Radxa Zero3";
description = "Enable Arducam Pivariety";
};
};

fragment@0 {
target-path = "/";
&{/} {

__overlay__ {
clk_cam_24m: external-camera-clock-24m {
status = "okay";
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "clk_cam_24m";
#clock-cells = <0>;
};

camera_pwdn_gpio: camera-pwdn-gpio {
status = "okay";
compatible = "regulator-fixed";
regulator-name = "camera_pwdn_gpio";
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
};
};
vcc_camera: vcc-camera {
status = "okay";
compatible = "regulator-fixed";
regulator-name = "vcc_camera";
gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};

fragment@1 {
target = <&i2c2>;
clock-frequency = <10000>;
#address-cells = <1>;
#size-cells = <0>;

__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
#address-cells = <1>;
#size-cells = <0>;

arducam_pivariety: arducam-pivariety@c {
compatible = "arducam,arducam-pivariety";
reg = <0x0c>;
clocks = <&clk_cam_24m>;
clock-names = "xclk";
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "IQ";
rockchip,camera-module-lens-name = "default";

port {
pivariety_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2>;
};
};
};
};
camera_pwdn_gpio: camera-pwdn-gpio {
status = "okay";
compatible = "regulator-fixed";
regulator-name = "camera_pwdn_gpio";
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
};

fragment@2 {
target = <&csi2_dphy_hw>;

__overlay__ {
status = "okay";
};
ext_cam_clk_arducam: ext-cam-clk-arducam {
status = "okay";
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "ext_cam_clk_arducam";
#clock-cells = <0>;
};
};

fragment@3 {
target = <&csi2_dphy0>;

__overlay__ {
status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&pivariety_out0>;
data-lanes = <1 2>;
};
};

port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;

dphy0_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp0_in>;
};
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
#address-cells = <1>;
#size-cells = <0>;

camera_arducam: camera-arducam@0c {
status = "okay";
compatible = "arducam,arducam-pivariety";
reg = <0x0c>;
clocks = <&ext_cam_clk_arducam>;
clock-names = "xclk";
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "arducam-camera";
rockchip,camera-module-lens-name = "default";

port {
arducam_out: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2>;
};
};
};
};

fragment@4 {
target = <&rkisp_vir0>;
&csi2_dphy_hw {
status = "okay";
};

__overlay__ {
status = "okay";
&csi2_dphy0 {
status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;

port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy0_out>;
};
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&arducam_out>;
data-lanes = <1 2>;
};
};
};

fragment@5 {
target = <&rkisp>;
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;

__overlay__ {
status = "okay";
dphy0_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp0_in>;
};
};
};
};

fragment@6 {
target = <&rkisp_mmu>;

__overlay__ {
status = "okay";
};
};
&rkisp_vir0 {
status = "okay";

fragment@7 {
target = <&rkcif_mmu>;
port {
#address-cells = <1>;
#size-cells = <0>;

__overlay__ {
status = "okay";
isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy0_out>;
};
};
};

&rkisp {
status = "okay";
};

fragment@8 {
target = <&rkcif>;
&rkisp_mmu {
status = "okay";
};

__overlay__ {
status = "okay";
};
};
&rkcif_mmu {
status = "okay";
};

&rkcif {
status = "okay";
};

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