diff --git a/documentation/chap/hardware/awg.tex b/documentation/chap/hardware/awg.tex index d24169a..7bd8e9a 100644 --- a/documentation/chap/hardware/awg.tex +++ b/documentation/chap/hardware/awg.tex @@ -1,7 +1,10 @@ +% todo: This document was not cheak-read yet. \section{Signal Generator} The Data Acquisition system should be extended by a arbitrary waveform generator which consists of a Digital to Analog Converter (DAC) and an amplification stage. This can be used to generate arbitrary signals: Sine-waves, triangular or rectangular periodical voltages with an adjustable frequency and amplitude. This enables students to explore and understand concepts in waveform generation, frequency modulation and signal processing and enhances the oscilloscope with a signal source. Many lab curse experiments can benefit from that e.g. measuring the frequency response of RC components, inductances or analysing the behavior or transistors and op-amps. +There are multiple ways how to create a waveform generator but then main structure is made out of three components. At first a analog voltage needs to be generated by a DAC. The DAC might need a buffer to provide an output current which can be achieved by using a buffer op-amp. At this point some amplification of the signal can be used to increase or decrease the magnitude of the signal. Finally this is used to drive an output stage in order to provide enough current for practical applications. Some of these components or even combinations of them can be bought as integrated circuits whereas others can be self made from simple building blocks. Many combinations might lead to the same result but the goal of this project is to make a cheap and simple signal generator without paying too much attention at a high precision (8 Bit resolution should be enough) or driving high frequencies\footnote{Note from the author: Initially I wished for a good signal generator but in the end I decided to go this way because it is cheaper by a couple euros.}. Therefore after a long time of researching components the way to go is: Using a R2R Ladder structure to turn 8 GPIO Pins from the Raspberry Pi Pico into a DAC and finding an Op-Amp which can provide enough current to drive a $\SI{50}{\Omega}$ signal line. + \subsection{R2R-Ladder DAC} The DAC is a self-made R2R Ladder Structure which is driven by some parallel connected GPIO Pins. A Diagram for a 4-Bit DAC can be seen in \cref{fig:r2r-ladder}. @@ -30,7 +33,7 @@ \subsection{R2R-Ladder DAC} \label{fig:r2r-ladder} \end{figure} -A detailed explanation how this DAC is working would take away some pages in this document so this explanation is going to cover only a rough overview. Any of the inputs $U_x$ can be set to a logical $1$ or a logical $0$ which is equivalent to connect the input to the supply voltage $V_{cc}$ or GND. If only the most significant bit (most right) )s set then all the other bits (on the left side) are connected to ground. The last digit ($B_0$) has two parallel resistors with a Value of $2R$ connected to ground, resulting in a Thevenin Equivalent circuit of a Grounding with a Thevenin resistance of $2R \parallel 2R = R$. After that the first resistor $R$ follows in series from where on both resistors are equivalent to $2R$. From there on the next Bit ($B_1$) is equally connected as the previous one before constructing the Thevenin Equivalent which means that the Thevenin Equivalent for all following zeroed Bits is the same. When we reach the first positive bit (in this case the highest order bit) the equivalent circuit is a voltage divider from $V_{cc}$ (the positive bit) to Ground via two $2R$ resistors and this results in an output voltage of $U_{DAC} = V_{cc} \cdot \frac{2R}{2R + 2R} = \frac{V_{cc}}{2}$ and a Thevenin resistance of $R$. +A detailed explanation how this DAC is working would take away some pages in this document so this explanation is going to cover only a rough overview. Any of the inputs $U_x$ can be set to a logical $1$ or a logical $0$ which is equivalent to connect the input to the supply voltage $V_{cc}$ or GND. If only the most significant bit (most right) is set then all the other bits (on the left side) are connected to ground. The last digit ($B_0$) has two parallel resistors with a Value of $2R$ connected to ground, resulting in a Thevenin Equivalent circuit of a Grounding with a Thevenin resistance of $2R \parallel 2R = R$. After that the first resistor $R$ follows in series from where on both resistors are equivalent to $2R$. From there on the next Bit ($B_1$) is equally connected as the previous one before constructing the Thevenin Equivalent which means that the Thevenin Equivalent for all following zeroed Bits is the same. When we reach the first positive bit (in this case the highest order bit) the equivalent circuit is a voltage divider from $V_{cc}$ (the positive bit) to Ground via two $2R$ resistors and this results in an output voltage of $U_{DAC} = V_{cc} \cdot \frac{2R}{2R + 2R} = \frac{V_{cc}}{2}$ and a Thevenin resistance of $R$. Let's assume that all bits are zero except for the second largest one. In this case again all the previous zeroed bits have a Thevenin equivalent of a grounded Connection with a resistance of $2R$ (Thevenin Resistance + R in series from the ladder) and the equivalent circuit of the positive bit is, as calculated before, $\frac{V_{cc}}{2}$ for the second largest bit. Following the resistor chain now the last bit, which is set to $0$, creates a second attenuator with the resistors $2R$ in series to $2R$. This halves the voltage again to $\frac{V_{cc}}{4}$ and keeps the Thevenin resistance still at $R$. @@ -44,8 +47,4 @@ \subsection{R2R-Ladder DAC} \] Unfortunately a R2R ladder DAC can never generate the full supply voltage $V_{cc}$ at its output but with a higher Bit resolution the difference shrinks to a negligibly small size. The R2R ladder generates the voltage but as in all previously explained situations the important rule for resistor networks also applies here: Drawing current changes the behavior of the network. Therefore again a combination of buffers and amplifiers, especially to create a output driver with a predefined impedance. -Last but not least a low-pass filter is useful to suppress aliasing effects. The R2R ladder has an output impedance equal to $R$ so the low-pass filter can be constructed by adding a capacitor. - -\subsection{The Output stage} - -\todo[inline]{write chapter} +Last but not least a low-pass filter is useful to suppress aliasing effects. The R2R ladder has an output impedance equal to $R$ so the only missing thing is to add a capacitor with the right size. To keep the output stage as simple as possible a voltage follower is made of an op-amp which can drive enough current to drive a $\SI{50}{\Omega}$ output. At a maximum voltage of $\SI{3,3}{V}$ the expected current is less than $\SI{70}{mA}$. For the frequency we can expect that in the fastest operation mode at $\SI{125}{MSps}$ a sine wave constructed from 64 samples\footnote{This is just an assumption without any technical background} stays below a frequency of $\SI{5}{MHz}$. The only challenge here is to find a device which has these capabilities (output current and unity-gain bandwidth) but is still cheap. diff --git a/hardware/afe.kicad_sch b/hardware/afe.kicad_sch index 9738f0a..4e3a742 100644 --- a/hardware/afe.kicad_sch +++ b/hardware/afe.kicad_sch @@ -1195,6 +1195,11 @@ (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 3e8a32a6-bd8f-44f5-a69a-055fe147885e) ) + (text "TODO: rotate them because one of the options must be infinitely high (voltage follower)" + (at 89.535 173.355 0) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid 403dbd4f-663b-4b91-aba3-e99e59b2406a) + ) (text "Clamping diode to prevent\nover- / undervoltage" (at 229.87 53.34 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 4196104f-ce69-4cd5-8386-819ab5e7d8fa) diff --git a/hardware/awg.kicad_sch b/hardware/awg.kicad_sch index dce8289..5770714 100644 --- a/hardware/awg.kicad_sch +++ b/hardware/awg.kicad_sch @@ -544,16 +544,16 @@ (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 8d51a62d-3afd-474f-8978-79d8c13a738c) ) - (text "todo:\n- Buffer\n- Output Stage with 50Ω driver\n- Test-Points" - (at 205.74 83.82 0) - (effects (font (size 1.27 1.27)) (justify left bottom)) - (uuid a745739f-6ba4-43e8-8474-de1711cdb375) - ) (text "8-Bit R2R Ladder DAC (parallel atached)\nAmplifier and 50Ω driver" (at 186.69 173.99 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid d87c77b8-e6df-4c56-8a80-d3346fe950ff) ) + (text "This Op-Amp is powerfull enough\nto drive a 50Ω line" + (at 101.6 71.12 0) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid ecd47050-a173-488c-bd05-d8979fef81c9) + ) (text "output impedance of R2R ladder: R = 2K2Ω\nMaximum frequency is assumed to be 5MHz\n=> Low-Pass filter needs a capacits of 15pF" (at 63.5 29.845 0) (effects (font (size 1.27 1.27)) (justify left bottom))