forked from tonioni/WinUAE
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathcputest.cpp
7034 lines (6510 loc) · 179 KB
/
cputest.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include "cputest.h"
#include "cputbl_test.h"
#include "readcpu.h"
#include "disasm.h"
#include "ini.h"
#include "fpp.h"
#include "softfloat/softfloat-specialize.h"
#include "zlib.h"
#include "options.h"
#define MAX_REGISTERS 16
#define EAFLAG_SP 1
#define FPUOPP_ILLEGAL 0x80
static floatx80 fpuregisters[8];
static uae_u32 fpu_fpiar, fpu_fpcr, fpu_fpsr;
struct regtype
{
const TCHAR *name;
uae_u8 type;
};
struct regdata
{
uae_u32 data[3];
uae_u8 type;
};
const int areg_byteinc[] = { 1, 1, 1, 1, 1, 1, 1, 2 };
const int imm8_table[] = { 8, 1, 2, 3, 4, 5, 6, 7 };
int movem_index1[256];
int movem_index2[256];
int movem_next[256];
int hardware_bus_error, hardware_bus_error_fake;
struct mmufixup mmufixup[2];
cpuop_func *cpufunctbl[65536];
struct cputbl_data
{
uae_s16 length;
uae_s8 disp020[2];
uae_u8 branch;
};
static struct cputbl_data cpudatatbl[65536];
struct regstruct regs;
struct flag_struct regflags;
int cpu_cycles;
static int verbose = 1;
static int feature_exception3_data = 0;
static int feature_exception3_instruction = 0;
static int feature_sr_mask = 0;
static int feature_undefined_ccr = 0;
static int feature_min_interrupt_mask = 0;
static int feature_loop_mode_cnt = 0;
static int feature_loop_mode_register = -1;
static int feature_loop_mode_68010 = 0;
static int feature_loop_mode_jit = 0;
static int feature_full_extension_format = 0;
static int feature_test_rounds = 2;
static int feature_test_rounds_opcode = 0;
static int feature_flag_mode = 0;
static int feature_usp = 0;
static int feature_exception_vectors = 0;
static int feature_interrupts = 0;
static int feature_instruction_size = 0;
static TCHAR *feature_instruction_size_text = NULL;
static uae_u32 feature_addressing_modes[2];
static int feature_gzip = 0;
static int ad8r[2], pc8r[2];
static int multi_mode;
#define MAX_TARGET_EA 20
static uae_u32 feature_target_ea[MAX_TARGET_EA][3];
static int target_ea_src_cnt, target_ea_dst_cnt, target_ea_opcode_cnt;
static int target_ea_src_max, target_ea_dst_max, target_ea_opcode_max;
static uae_u32 target_ea[3];
static int maincpu[6];
static uae_u8 exceptionenabletable[256];
#define MAX_REGDATAS 32
static int regdatacnt;
static struct regdata regdatas[MAX_REGDATAS];
#define HIGH_MEMORY_START (addressing_mask == 0xffffffff ? 0xffff8000 : 0x00ff8000)
// large enough for RTD
#define STACK_SIZE (0x8000 + 8)
#define RESERVED_SUPERSTACK 1024
// space between superstack and USP
#define RESERVED_USERSTACK_EXTRA 128
// space for extra exception, not part of test region
#define EXTRA_RESERVED_SPACE 1024
static uae_u32 test_low_memory_start;
static uae_u32 test_low_memory_end;
static uae_u32 test_high_memory_start;
static uae_u32 test_high_memory_end;
static uae_u32 low_memory_size = 32768;
static uae_u32 high_memory_size = 32768;
static uae_u32 safe_memory_start;
static uae_u32 safe_memory_end;
static int safe_memory_mode;
static uae_u32 user_stack_memory, super_stack_memory;
static uae_u32 user_stack_memory_use;
static uae_u8 *low_memory, *high_memory, *test_memory;
static uae_u8 *low_memory_temp, *high_memory_temp, *test_memory_temp;
static uae_u8 dummy_memory[4];
static uaecptr test_memory_start, test_memory_end, opcode_memory_start;
static uae_u32 test_memory_size;
static int hmem_rom, lmem_rom;
static uae_u8 *opcode_memory;
static uae_u8 *storage_buffer;
static char inst_name[16+1];
static int storage_buffer_watermark_size;
static int storage_buffer_watermark;
static int max_storage_buffer;
static bool out_of_test_space;
static uaecptr out_of_test_space_addr;
static int forced_immediate_mode;
static int test_exception;
static int test_exception_extra;
static int exception_stack_frame_size;
static uae_u8 exception_extra_frame[100];
static int exception_extra_frame_size, exception_extra_frame_type;
static uaecptr test_exception_addr;
static int test_exception_3_w;
static int test_exception_3_fc;
static int test_exception_3_size;
static int test_exception_3_di;
static uae_u16 test_exception_3_sr;
static int test_exception_opcode;
static uae_u32 trace_store_pc;
static uae_u16 trace_store_sr;
static int generate_address_mode;
static int test_memory_access_mask;
static uae_u8 imm8_cnt;
static uae_u16 imm16_cnt;
static uae_u32 imm32_cnt;
static uae_u32 immabsw_cnt;
static uae_u32 immabsl_cnt;
static uae_u32 specials_cnt;
static uae_u32 immfpu_cnt;
static uae_u32 addressing_mask;
static int opcodecnt;
static int cpu_stopped;
static int cpu_halted;
static int cpu_lvl = 0;
static int test_count;
static int testing_active;
static uae_u16 testing_active_opcode;
static time_t starttime;
static int filecount;
static uae_u16 sr_undefined_mask;
static int low_memory_accessed;
static int high_memory_accessed;
static int test_memory_accessed;
static uae_u16 extra_or, extra_and;
static struct regstruct cur_regs;
static uae_u16 read_buffer_prev;
static int interrupt_count;
static int interrupt_cycle_cnt, interrupt_delay_cnt;
static int interrupt_level;
static uaecptr test_instruction_end_pc;
static uaecptr lm_safe_address;
static uae_u8 ccr_cnt;
struct uae_prefs currprefs;
struct accesshistory
{
uaecptr addr;
uae_u32 val;
uae_u32 oldval;
int size;
bool donotsave;
};
static int ahcnt_current, ahcnt_written;
static int noaccesshistory = 0;
#define MAX_ACCESSHIST 32000
static struct accesshistory ahist[MAX_ACCESSHIST];
static void pw(uae_u8 *p, uae_u16 v)
{
p[0] = v >> 8;
p[1] = v >> 0;
}
static void pl(uae_u8 *p, uae_u32 v)
{
p[0] = v >> 24;
p[1] = v >> 16;
p[2] = v >> 8;
p[3] = v >> 0;
}
static uae_u32 gl(uae_u8 *p)
{
return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3] << 0);
}
static uae_u32 gw(uae_u8 *p)
{
return (p[0] << 8) | (p[1] << 0);
}
void cputester_fault(void)
{
test_exception = -1;
}
static int is_superstack_use_required(void)
{
switch (testing_active_opcode)
{
case 0x4e73: // RTE
return 1;
}
return 0;
}
static bool valid_address(uaecptr addr, int size, int rwp)
{
int w = rwp == 2;
addr &= addressing_mask;
size--;
if (low_memory_size != 0xffffffff && addr + size < low_memory_size) {
if (addr < test_low_memory_start || test_low_memory_start == 0xffffffff)
goto oob;
// exception vectors needed during tests
if (currprefs.cpu_model == 68000) {
if ((addr + size >= 0x08 && addr < 0x30 || (addr + size >= 0x80 && addr < 0xc0)))
goto oob;
if (feature_interrupts && (addr + size >= 0x64 && addr < 0x7c))
goto oob;
}
if (addr + size >= test_low_memory_end)
goto oob;
if (w && lmem_rom)
goto oob;
if (testing_active) {
low_memory_accessed = w ? -1 : 1;
}
return 1;
}
if (high_memory_size != 0xffffffff && addr >= HIGH_MEMORY_START && addr <= HIGH_MEMORY_START + 0x7fff) {
if (addr < test_high_memory_start || test_high_memory_start == 0xffffffff)
goto oob;
if (addr + size >= test_high_memory_end)
goto oob;
if (w && hmem_rom)
goto oob;
if (testing_active) {
high_memory_accessed = w ? -1 : 1;
}
return 1;
}
if (addr >= super_stack_memory - RESERVED_SUPERSTACK && addr + size < super_stack_memory) {
// allow only instructions that have to access super stack, for example RTE
// read-only
if (w) {
goto oob;
}
if (testing_active) {
if (is_superstack_use_required()) {
test_memory_accessed = 1;
return 1;
}
}
goto oob;
}
if (addr >= test_memory_end && addr + size < test_memory_end + EXTRA_RESERVED_SPACE) {
if (testing_active < 0)
return 1;
}
if (addr >= test_memory_start && addr + size < test_memory_end) {
// make sure we don't modify our test instruction
if (testing_active && w) {
if (addr >= opcode_memory_start && addr + size < opcode_memory_start + OPCODE_AREA)
goto oob;
}
// don't read data from our test instruction or nop/illegal words. Prefetches allowed.
if (testing_active && (rwp & 1)) {
if (addr >= opcode_memory_start && addr + size < opcode_memory_start + OPCODE_AREA)
goto oob;
}
if (testing_active) {
test_memory_accessed = w ? -1 : 1;
}
return 1;
}
oob:
return 0;
}
static bool check_valid_addr(uaecptr addr, int size, int rwp)
{
if (!valid_address(addr, 1, rwp))
return false;
if (!valid_address(addr + size - 1, 1, rwp))
return false;
return true;
}
static bool is_nowrite_address(uaecptr addr, int size)
{
return addr + size > safe_memory_start && addr < safe_memory_end;
}
static void validate_addr(uaecptr addr, int size)
{
if (valid_address(addr, size, 0))
return;
wprintf(_T(" Trying to store invalid memory address %08x!?\n"), addr);
abort();
}
static uae_u8 *get_addr(uaecptr addr, int size, int rwp)
{
// allow debug output to read memory even if oob condition
if (rwp >= 0 && out_of_test_space)
goto oob;
if (!valid_address(addr, 1, rwp))
goto oob;
if (size > 1) {
if (!valid_address(addr + size - 1, 1, rwp))
goto oob;
}
addr &= addressing_mask;
size--;
// if loop mode: loop mode buffer can be only accessed by loop mode store instruction
if (feature_loop_mode_jit && testing_active && addr >= test_memory_start && addr + size < test_memory_start + LM_BUFFER && lm_safe_address != regs.pc) {
goto oob;
}
if (low_memory_size != 0xffffffff && addr + size < low_memory_size) {
return low_memory + addr;
} else if (high_memory_size != 0xffffffff && addr >= HIGH_MEMORY_START && addr <= HIGH_MEMORY_START + 0x7fff) {
return high_memory + (addr - HIGH_MEMORY_START);
} else if (addr >= test_memory_start && addr + size < test_memory_end + EXTRA_RESERVED_SPACE) {
return test_memory + (addr - test_memory_start);
}
oob:
if (rwp >= 0) {
if (!out_of_test_space) {
out_of_test_space = true;
out_of_test_space_addr = addr;
}
}
dummy_memory[0] = 0;
dummy_memory[1] = 0;
dummy_memory[2] = 0;
dummy_memory[3] = 0;
return dummy_memory;
}
static void count_interrupt_cycles(int cycles)
{
if (!interrupt_cycle_cnt)
return;
interrupt_cycle_cnt -= cycles;
if (interrupt_cycle_cnt <= 0) {
interrupt_cycle_cnt = 0;
interrupt_level = 6;
}
}
void do_cycles_test(int cycles)
{
if (!testing_active)
return;
cpu_cycles += cycles;
count_interrupt_cycles(cycles);
}
static void add_memory_cycles(int c)
{
if (!testing_active)
return;
if (trace_store_pc != 0xffffffff)
return;
c *= 4;
cpu_cycles += c;
count_interrupt_cycles(c);
}
static void check_bus_error(uaecptr addr, int write, int fc)
{
if (!testing_active)
return;
if (!write && (fc & 2)) {
test_memory_access_mask |= 4;
} else if (!write && !(fc & 2)) {
test_memory_access_mask |= 1;
} else if (write) {
test_memory_access_mask |= 2;
}
if (safe_memory_start == 0xffffffff && safe_memory_end == 0xffffffff)
return;
if (addr >= safe_memory_start && addr < safe_memory_end) {
hardware_bus_error_fake = -1;
if ((safe_memory_mode & 4) && !write && (fc & 2)) {
hardware_bus_error |= 4;
hardware_bus_error_fake |= 1;
} else if ((safe_memory_mode & 1) && !write && !(fc & 2)) {
hardware_bus_error |= 1;
hardware_bus_error_fake |= 1;
} else if ((safe_memory_mode & 2) && write) {
hardware_bus_error |= 2;
hardware_bus_error_fake |= 2;
}
if (!write && (fc & 2) && feature_usp == 3) {
out_of_test_space = true;
out_of_test_space_addr = addr;
}
}
}
static uae_u8 get_ibyte_test(uaecptr addr)
{
check_bus_error(addr, 0, regs.s ? 5 : 1);
uae_u8 *p = get_addr(addr, 1, 4);
add_memory_cycles(1);
return *p;
}
static uae_u16 get_iword_test(uaecptr addr)
{
check_bus_error(addr, 0, regs.s ? 6 : 2);
if (addr & 1) {
return (get_ibyte_test(addr + 0) << 8) | (get_ibyte_test(addr + 1) << 0);
} else {
uae_u8 *p = get_addr(addr, 2, 4);
add_memory_cycles(1);
return (p[0] << 8) | (p[1]);
}
}
uae_u32 get_ilong_test(uaecptr addr)
{
uae_u32 v;
check_bus_error(addr, 0, regs.s ? 6 : 2);
if (addr & 1) {
uae_u8 v0 = get_ibyte_test(addr + 0);
uae_u16 v1 = get_iword_test(addr + 1);
uae_u8 v3 = get_ibyte_test(addr + 3);
v = (v0 << 24) | (v1 << 8) | (v3 << 0);
} else if (addr & 2) {
uae_u16 v0 = get_iword_test(addr + 0);
uae_u16 v1 = get_iword_test(addr + 2);
v = (v0 << 16) | (v1 << 0);
} else {
uae_u8 *p = get_addr(addr, 4, 4);
v = (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3]);
add_memory_cycles(2);
}
return v;
}
uae_u16 get_word_test_prefetch(int o)
{
// no real prefetch
if (cpu_lvl < 2)
o -= 2;
add_memory_cycles(-1);
regs.irc = get_iword_test(m68k_getpci() + o + 2);
read_buffer_prev = regs.read_buffer;
regs.read_buffer = regs.irc;
return get_iword_test(m68k_getpci() + o);
}
static void previoussame(uaecptr addr, int size, uae_u32 *old)
{
if (!ahcnt_current || ahcnt_current == ahcnt_written)
return;
// Move from SR does two writes to same address.
// Loop mode can write different values to same address.
// Mark old values as do not save.
// Also loop mode test can do multi writes and it needs original value.
bool gotold = false;
for (int i = ahcnt_written; i < ahcnt_current; i++) {
struct accesshistory *ah = &ahist[i];
if (((!feature_loop_mode_jit && !feature_loop_mode_68010) || !testing_active) && ah->size == size && ah->addr == addr) {
ah->donotsave = true;
if (!gotold) {
*old = ah->oldval;
gotold = true;
}
}
if (cpu_lvl < 2) {
if (size == sz_long) {
if (ah->size == sz_word && ah->addr == addr) {
ah->donotsave = true;
}
if (ah->size == sz_word && ah->addr == addr + 2) {
ah->donotsave = true;
}
}
}
}
}
void put_byte_test(uaecptr addr, uae_u32 v)
{
if (!testing_active && is_nowrite_address(addr, 1))
return;
check_bus_error(addr, 1, regs.s ? 5 : 1);
uae_u8 *p = get_addr(addr, 1, 2);
if (!out_of_test_space && !noaccesshistory && !hardware_bus_error_fake) {
uae_u32 old = p[0];
previoussame(addr, sz_byte, &old);
if (ahcnt_current >= MAX_ACCESSHIST) {
wprintf(_T(" ahist overflow!"));
abort();
}
struct accesshistory *ah = &ahist[ahcnt_current++];
ah->addr = addr;
ah->val = v & 0xff;
ah->oldval = old & 0xff;
ah->size = sz_byte;
ah->donotsave = false;
}
regs.write_buffer &= 0xff00;
regs.write_buffer |= v & 0xff;
*p = v;
add_memory_cycles(1);
}
void put_word_test(uaecptr addr, uae_u32 v)
{
if (!testing_active && is_nowrite_address(addr, 1))
return;
check_bus_error(addr, 1, regs.s ? 5 : 1);
if (addr & 1) {
put_byte_test(addr + 0, v >> 8);
put_byte_test(addr + 1, v >> 0);
} else {
uae_u8 *p = get_addr(addr, 2, 2);
if (!out_of_test_space && !noaccesshistory && !hardware_bus_error_fake) {
uae_u32 old = (p[0] << 8) | p[1];
previoussame(addr, sz_word, &old);
if (ahcnt_current >= MAX_ACCESSHIST) {
wprintf(_T(" ahist overflow!"));
abort();
}
struct accesshistory *ah = &ahist[ahcnt_current++];
ah->addr = addr;
ah->val = v & 0xffff;
ah->oldval = old & 0xffff;
ah->size = sz_word;
ah->donotsave = false;
}
p[0] = v >> 8;
p[1] = v & 0xff;
}
regs.write_buffer = v;
add_memory_cycles(1);
}
void put_long_test(uaecptr addr, uae_u32 v)
{
if (!testing_active && is_nowrite_address(addr, 1))
return;
check_bus_error(addr, 1, regs.s ? 5 : 1);
if (addr & 1) {
put_byte_test(addr + 0, v >> 24);
put_word_test(addr + 1, v >> 8);
put_byte_test(addr + 3, v >> 0);
} else if (addr & 2) {
put_word_test(addr + 0, v >> 16);
put_word_test(addr + 2, v >> 0);
} else {
uae_u8 *p = get_addr(addr, 4, 2);
if (!out_of_test_space && !noaccesshistory && !hardware_bus_error_fake) {
uae_u32 old = (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
previoussame(addr, sz_long, &old);
if (ahcnt_current >= MAX_ACCESSHIST) {
wprintf(_T(" ahist overflow!"));
abort();
}
struct accesshistory *ah = &ahist[ahcnt_current++];
ah->addr = addr;
ah->val = v;
ah->oldval = old;
ah->size = sz_long;
ah->donotsave = false;
}
p[0] = v >> 24;
p[1] = v >> 16;
p[2] = v >> 8;
p[3] = v >> 0;
add_memory_cycles(2);
}
regs.write_buffer = v;
}
static void undo_memory(struct accesshistory *ahp, int end)
{
out_of_test_space = 0;
noaccesshistory = 1;
for (int i = ahcnt_current - 1; i >= end; i--) {
struct accesshistory *ah = &ahp[i];
switch (ah->size)
{
case sz_byte:
put_byte_test(ah->addr, ah->oldval);
break;
case sz_word:
put_word_test(ah->addr, ah->oldval);
break;
case sz_long:
put_long_test(ah->addr, ah->oldval);
break;
}
}
noaccesshistory = 0;
if (out_of_test_space) {
wprintf(_T(" undo_memory out of test space fault!?\n"));
abort();
}
ahcnt_current = end;
}
uae_u32 get_byte_test(uaecptr addr)
{
check_bus_error(addr, 0, regs.s ? 5 : 1);
uae_u8 *p = get_addr(addr, 1, 1);
read_buffer_prev = regs.read_buffer;
regs.read_buffer &= 0xff00;
regs.read_buffer |= *p;
add_memory_cycles(1);
return *p;
}
uae_u32 get_word_test(uaecptr addr)
{
uae_u16 v;
check_bus_error(addr, 0, regs.s ? 5 : 1);
if (addr & 1) {
v = (get_byte_test(addr + 0) << 8) | (get_byte_test(addr + 1) << 0);
} else {
uae_u8 *p = get_addr(addr, 2, 1);
v = (p[0] << 8) | (p[1]);
}
read_buffer_prev = regs.read_buffer;
regs.read_buffer = v;
add_memory_cycles(1);
return v;
}
uae_u32 get_long_test(uaecptr addr)
{
uae_u32 v;
check_bus_error(addr, 0, regs.s ? 5 : 1);
if (addr & 1) {
uae_u8 v0 = get_byte_test(addr + 0);
uae_u16 v1 = get_word_test(addr + 1);
uae_u8 v3 = get_byte_test(addr + 3);
v = (v0 << 24) | (v1 << 8) | (v3 << 0);
} else if (addr & 2) {
uae_u16 v0 = get_word_test(addr + 0);
uae_u16 v1 = get_word_test(addr + 2);
v = (v0 << 16) | (v1 << 0);
} else {
uae_u8 *p = get_addr(addr, 4, 1);
v = (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3]);
add_memory_cycles(2);
}
read_buffer_prev = regs.read_buffer;
regs.read_buffer = v;
return v;
}
uae_u32 get_byte_debug(uaecptr addr)
{
uae_u8 *p = get_addr(addr, 1, -1);
return *p;
}
uae_u32 get_word_debug(uaecptr addr)
{
uae_u8 *p = get_addr(addr, 2, -1);
return (p[0] << 8) | (p[1]);
}
uae_u32 get_long_debug(uaecptr addr)
{
uae_u8 *p = get_addr(addr, 4, -1);
return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3]);
}
uae_u32 get_iword_debug(uaecptr addr)
{
return get_word_debug(addr);
}
uae_u32 get_ilong_debug(uaecptr addr)
{
return get_long_debug(addr);
}
uae_u32 get_byte_cache_debug(uaecptr addr, bool *cached)
{
*cached = false;
return get_byte_test(addr);
}
uae_u32 get_word_cache_debug(uaecptr addr, bool *cached)
{
*cached = false;
return get_word_test(addr);
}
uae_u32 get_long_cache_debug(uaecptr addr, bool *cached)
{
*cached = false;
return get_long_test(addr);
}
uae_u32 sfc_nommu_get_byte(uaecptr addr)
{
return get_byte_test(addr);
}
uae_u32 sfc_nommu_get_word(uaecptr addr)
{
return get_word_test(addr);
}
uae_u32 sfc_nommu_get_long(uaecptr addr)
{
return get_long_test(addr);
}
void dfc_nommu_put_byte(uaecptr addr, uae_u32 v)
{
put_byte_test(addr, v);
}
void dfc_nommu_put_word(uaecptr addr, uae_u32 v)
{
put_word_test(addr, v);
}
void dfc_nommu_put_long(uaecptr addr, uae_u32 v)
{
put_long_test(addr, v);
}
uae_u16 get_wordi_test(int o)
{
uae_u32 v = get_word_test_prefetch(o);
regs.pc += 2;
return v;
}
uae_u32 memory_get_byte(uaecptr addr)
{
return get_byte_test(addr);
}
uae_u32 memory_get_word(uaecptr addr)
{
return get_word_test(addr);
}
uae_u32 memory_get_wordi(uaecptr addr)
{
return get_iword_test(addr);
}
uae_u32 memory_get_long(uaecptr addr)
{
return get_long_test(addr);
}
uae_u32 memory_get_longi(uaecptr addr)
{
return get_ilong_test(addr);
}
void memory_put_long(uaecptr addr, uae_u32 v)
{
put_long_test(addr, v);
}
void memory_put_word(uaecptr addr, uae_u32 v)
{
put_word_test(addr, v);
}
void memory_put_byte(uaecptr addr, uae_u32 v)
{
put_byte_test(addr, v);
}
uae_u8 *memory_get_real_address(uaecptr addr)
{
return NULL;
}
uae_u32 next_iword_test(void)
{
uae_u32 v = get_word_test_prefetch(0);
regs.pc += 2;
return v;
}
uae_u32 next_ilong_test(void)
{
uae_u32 v = get_word_test_prefetch(0) << 16;
v |= get_word_test_prefetch(2);
regs.pc += 4;
return v;
}
bool mmu_op30(uaecptr pc, uae_u32 opcode, uae_u16 extra, uaecptr extraa)
{
m68k_setpc(pc);
op_illg(opcode);
return true;
}
bool is_cycle_ce(uaecptr addr)
{
return 0;
}
void ipl_fetch(void)
{
}
int intlev(void)
{
return interrupt_level;
}
uae_u32(*x_get_long)(uaecptr);
uae_u32(*x_get_word)(uaecptr);
uae_u32(*x_get_byte)(uaecptr);
void (*x_put_long)(uaecptr, uae_u32);
void (*x_put_word)(uaecptr, uae_u32);
void (*x_put_byte)(uaecptr, uae_u32);
uae_u32(*x_cp_get_long)(uaecptr);
uae_u32(*x_cp_get_word)(uaecptr);
uae_u32(*x_cp_get_byte)(uaecptr);
void (*x_cp_put_long)(uaecptr, uae_u32);
void (*x_cp_put_word)(uaecptr, uae_u32);
void (*x_cp_put_byte)(uaecptr, uae_u32);
uae_u32(*x_cp_next_iword)(void);
uae_u32(*x_cp_next_ilong)(void);
uae_u32(*x_next_iword)(void);
uae_u32(*x_next_ilong)(void);
void (*x_do_cycles)(unsigned long);
uae_u32(REGPARAM3 *x_cp_get_disp_ea_020)(uae_u32 base, int idx) REGPARAM;
void m68k_do_rts_ce(void)
{
uaecptr pc;
pc = x_get_word(m68k_areg(regs, 7)) << 16;
pc |= x_get_word(m68k_areg(regs, 7) + 2);
m68k_areg(regs, 7) += 4;
m68k_setpci(pc);
}
void m68k_do_bsr_ce(uaecptr oldpc, uae_s32 offset)
{
m68k_areg(regs, 7) -= 4;
x_put_word(m68k_areg(regs, 7), oldpc >> 16);
x_put_word(m68k_areg(regs, 7) + 2, oldpc);
m68k_incpci(offset);
}
void m68k_do_jsr_ce(uaecptr oldpc, uaecptr dest)
{
m68k_areg(regs, 7) -= 4;
x_put_word(m68k_areg(regs, 7), oldpc >> 16);
x_put_word(m68k_areg(regs, 7) + 2, oldpc);
m68k_setpci(dest);
}
static int SPCFLAG_TRACE, SPCFLAG_DOTRACE;
uae_u32 get_disp_ea_test(uae_u32 base, uae_u32 dp)
{
int reg = (dp >> 12) & 15;
uae_s32 regd = regs.regs[reg];
if ((dp & 0x800) == 0)
regd = (uae_s32)(uae_s16)regd;
return base + (uae_s8)dp + regd;
}
static void activate_trace(void)
{
SPCFLAG_TRACE = 0;
SPCFLAG_DOTRACE = 1;
}
static void do_trace(void)
{
regs.trace_pc = regs.pc;
if (regs.t0 && !regs.t1 && currprefs.cpu_model >= 68020) {
// this is obsolete
return;
}
if (regs.t1) {
activate_trace();
}
}
void REGPARAM2 MakeSR(void)
{
regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
| (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
| (GET_XFLG() << 4) | (GET_NFLG() << 3)
| (GET_ZFLG() << 2) | (GET_VFLG() << 1)
| GET_CFLG());
}
void MakeFromSR_x(int t0trace)
{
int oldm = regs.m;
int olds = regs.s;
int oldt0 = regs.t0;
int oldt1 = regs.t1;
SET_XFLG((regs.sr >> 4) & 1);
SET_NFLG((regs.sr >> 3) & 1);
SET_ZFLG((regs.sr >> 2) & 1);
SET_VFLG((regs.sr >> 1) & 1);
SET_CFLG(regs.sr & 1);
regs.t1 = (regs.sr >> 15) & 1;
regs.t0 = (regs.sr >> 14) & 1;
regs.s = (regs.sr >> 13) & 1;
regs.m = (regs.sr >> 12) & 1;
regs.intmask = (regs.sr >> 8) & 7;
if (currprefs.cpu_model >= 68020) {
/* 68060 does not have MSP but does have M-bit.. */
if (currprefs.cpu_model >= 68060)
regs.msp = regs.isp;
if (olds != regs.s) {
if (olds) {
if (oldm)
regs.msp = m68k_areg (regs, 7);
else
regs.isp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.usp;
} else {
regs.usp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.m ? regs.msp : regs.isp;
}
} else if (olds && oldm != regs.m) {
if (oldm) {
regs.msp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.isp;
} else {
regs.isp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.msp;
}
}
if (currprefs.cpu_model >= 68060)
regs.t0 = 0;
} else {
regs.t0 = regs.m = 0;
if (olds != regs.s) {
if (olds) {
regs.isp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.usp;
} else {
regs.usp = m68k_areg (regs, 7);
m68k_areg (regs, 7) = regs.isp;
}
}
}
if (regs.t1 || regs.t0) {
SPCFLAG_TRACE = 1;
} else {
/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
SR-modifying instructions (including STOP). */
SPCFLAG_TRACE = 0;
}
// STOP SR-modification does not generate T0
// If this SR modification set Tx bit, no trace until next instruction.
if ((oldt0 && t0trace && currprefs.cpu_model >= 68020) || oldt1) {
// Always trace if Tx bits were already set, even if this SR modification cleared them.
activate_trace();
}
}
void REGPARAM2 MakeFromSR_T0(void)
{
MakeFromSR_x(1);
}
void REGPARAM2 MakeFromSR(void)
{
MakeFromSR_x(0);
}
void REGPARAM2 MakeFromSR_intmask(uae_u16 oldsr, uae_u16 newsr)
{
}
void cpu_halt(int halt)
{
cpu_halted = halt;
}