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blitter.cpp
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/*
* UAE - The Un*x Amiga Emulator
*
* Custom chip emulation
*
* (c) 1995 Bernd Schmidt, Alessandro Bissacco
* (c) 2002 - 2021 Toni Wilen
*/
#define SPEEDUP 1
#define BLITTER_DEBUG 0
#include "sysconfig.h"
#include "sysdeps.h"
#include "options.h"
#include "uae.h"
#include "memory.h"
#include "custom.h"
#include "events.h"
#include "newcpu.h"
#include "blitter.h"
#include "blit.h"
#include "savestate.h"
#include "debug.h"
// 1 = logging
// 2 = no wait detection
// 4 = no D
// 8 = instant
// 16 = activate debugger if weird things
// 32 = logging (no line)
#if BLITTER_DEBUG
int log_blitter = 1 | 16;
#else
int log_blitter = 0;
#endif
#define BLTDOFF 0x80
#define BLTSIGN 0x40
#define BLTOVG 0x20
#define BLTSING 0x02
#define BLTDESC 0x02
#define BLTLINE 0x01
/* we must not change ce-mode while blitter is running.. */
static int blitter_cycle_exact, immediate_blits;
static int blt_statefile_type;
uae_u16 bltcon0, bltcon1;
uae_u32 bltapt, bltbpt, bltcpt, bltdpt;
uae_u32 bltptx;
int bltptxpos, bltptxc;
static uae_u16 blinea, blineb;
static int blitline, blitfc, blitfill, blitife, blitdesc, blit_ovf;
static bool blitfill_idle;
static int blitline_started;
static int blitonedot, blitlinepixel;
static int blit_add;
static int blit_modadda, blit_modaddb, blit_modaddc, blit_modaddd;
static int blit_ch;
static bool shifter_skip_b, shifter_skip_y;
static bool shifter_skip_b_old, shifter_skip_y_old;
static uae_u16 bltcon0_old, bltcon1_old;
static bool shifter[4], shifter_out;
static int shifter_first;
static bool blitline_c, blitfill_c;
static int blitter_delayed_debug;
#ifdef BLITTER_SLOWDOWNDEBUG
static int blitter_slowdowndebug;
#endif
struct bltinfo blt_info;
static uae_u8 blit_filltable[256][4][2];
uae_u32 blit_masktable[BLITTER_MAX_WORDS];
static int blit_cyclecounter, blit_waitcyclecounter;
static int blit_maxcyclecounter, blit_slowdown, blit_totalcyclecounter;
static int blit_misscyclecounter;
static int blit_copperstarted;
#ifdef CPUEMU_13
static int blitter_cyclecounter;
static int blitter_hcounter;
static int blitter_vcounter;
#endif
static long blit_firstline_cycles;
static long blit_first_cycle;
static int blit_last_cycle, blit_dmacount, blit_cyclecount;
static int blit_linecycles, blit_extracycles;
static int blit_faulty;
static int blt_delayed_irq;
static uae_u16 ddat1;
static int ddat1use, ddat2use;
static int blit_dof;
static int last_blitter_hpos;
static uae_u16 debug_bltcon0, debug_bltcon1;
static uae_u32 debug_bltapt, debug_bltbpt, debug_bltcpt, debug_bltdpt;
static uae_u16 debug_bltamod, debug_bltbmod, debug_bltcmod, debug_bltdmod;
static uae_u32 debug_bltafwm, debug_bltalwm;
static uae_u32 debug_bltpc;
static int debug_bltcop;
static uae_u16 debug_bltsizev, debug_bltsizeh;
static uae_u16 debug_bltadat, debug_bltbdat, debug_bltcdat;
#define BLITTER_MAX_PIPELINED_CYCLES 4
#define CYCLECOUNT_FINISHED -1000
#define CYCLECOUNT_START 3
/*
Blitter Idle Cycle:
Cycles that are free cycles (available for CPU) and
are not used by any other Agnus DMA channel. Blitter
idle cycle is not "used" by blitter, CPU can still use
it normally if it needs the bus.
same in both block and line modes
number of cycles, initial cycle, main cycle
*/
#if 0
#define DIAGSIZE 10
static const int blit_cycle_diagram[][DIAGSIZE] =
{
{ 2, 0,0, 0,0 }, /* 0 -- */
{ 2, 0,0, 0,4 }, /* 1 -D */
{ 2, 0,3, 0,3 }, /* 2 -C */
{ 3, 0,3,0, 0,3,4 }, /* 3 -CD */
{ 3, 0,2,0, 0,2,0 }, /* 4 -B- */
{ 3, 0,2,0, 0,2,4 }, /* 5 -BD */
{ 3, 0,2,3, 0,2,3 }, /* 6 -BC */
{ 4, 0,2,3,0, 0,2,3,4 }, /* 7 -BCD */
{ 2, 1,0, 1,0 }, /* 8 A- */
{ 2, 1,0, 1,4 }, /* 9 AD */
{ 2, 1,3, 1,3 }, /* A AC */
{ 3, 1,3,0, 1,3,4, }, /* B ACD */
{ 3, 1,2,0, 1,2,0 }, /* C AB- */
{ 3, 1,2,0, 1,2,4 }, /* D ABD */
{ 3, 1,2,3, 1,2,3 }, /* E ABC */
{ 4, 1,2,3,0, 1,2,3,4 } /* F ABCD */
};
#endif
/*
following 4 channel combinations in fill mode have extra
idle cycle added (still requires free bus cycle)
Condition: If D without C: Add extra cycle.
*/
#if 0
// Cycle sequences are now generated using same
// logic as real blitter. Tables are not used anymore.
static const int blit_cycle_diagram_fill[][DIAGSIZE] =
{
{ 0 }, /* 0 -- */
{ 3, 0,0,0, 0,4,0 }, /* 1 -D */
{ 0 }, /* 2 -C */
{ 0 }, /* 3 -CD */
{ 0 }, /* 4 -B- */
{ 4, 0,2,0,0, 0,2,4,0 }, /* 5 -BD */
{ 0 }, /* 6 -BC */
{ 0 }, /* 7 -BCD */
{ 0 }, /* 8 A- */
{ 3, 1,0,0, 1,4,0 }, /* 9 AD */
{ 0 }, /* A AC */
{ 0 }, /* B ACD */
{ 0 }, /* C AB- */
{ 4, 1,2,0,0, 1,2,4,0 }, /* D ABD */
{ 0 }, /* E ABC */
{ 0 }, /* F ABCD */
};
#endif
/*
-C-D C-D- ... C-D- --
line draw takes 4 cycles (-C-D)
idle cycles do the same as above, 2 dma fetches
(read from C, write to D, but see below)
Oddities:
- first word is written to address pointed by BLTDPT
but all following writes go to address pointed by BLTCPT!
(some kind of internal copy because all bus cyles are
using normal BLTDDAT)
- BLTDMOD is ignored by blitter (BLTCMOD is used)
- state of D-channel enable bit does not matter!
- disabling A-channel freezes the content of BPLAPT
- C-channel disabled: nothing is written
There is one tricky situation, writing to DFF058 just before
last D write cycle (which is normally free) does not disturb
blitter operation, final D is still written correctly before
blitter starts normally (after 2 idle cycles)
There is at least one demo that does this..
*/
/* Copper pointer to Blitter register copy bug
1: -d = D (-D)
2: -c = C (-C)
3: - (-CD)
4: - (-B-)
5: - (-BD)
6: - (-BC)
7: -BcD = C, -BCd = D
8: - (A-)
9: - (AD)
A: - (AC)
B: A (ACD)
C: - (AB-)
D: - (ABD-)
E: - (ABC)
F: AxBxCxD = -, aBxCxD = A,
1FE,8C,RGA,8C
*/
void build_blitfilltable (void)
{
unsigned int d, fillmask;
int i;
for (i = 0; i < BLITTER_MAX_WORDS; i++)
blit_masktable[i] = 0xFFFF;
for (d = 0; d < 256; d++) {
for (i = 0; i < 4; i++) {
int fc = i & 1;
uae_u8 data = d;
for (fillmask = 1; fillmask != 0x100; fillmask <<= 1) {
uae_u16 tmp = data;
if (fc) {
if (i & 2)
data |= fillmask;
else
data ^= fillmask;
}
if (tmp & fillmask) fc = !fc;
}
blit_filltable[d][i][0] = data;
blit_filltable[d][i][1] = fc;
}
}
}
static void record_dma_blit_val(uae_u32 v)
{
#ifdef DEBUGGER
if (debug_dma && blitter_cycle_exact) {
record_dma_read_value(v);
}
if (memwatch_enabled) {
debug_getpeekdma_value(v);
}
#endif
}
static void record_dma_blit(uae_u16 reg, uae_u16 v, uae_u32 addr, int hpos)
{
#ifdef DEBUGGER
if (debug_dma && blitter_cycle_exact) {
if (reg == 0) {
record_dma_write(reg, v, addr, hpos, vpos, DMARECORD_BLITTER, 3 + (blitline_c ? 0x20 : (blitfill_c ? 0x10 : 0)));
} else {
int r = 0;
if (reg == 0x70)
r = 2;
if (reg == 0x72)
r = 1;
if (reg == 0x74)
r = 0;
record_dma_read(reg, addr, hpos, vpos, DMARECORD_BLITTER, r + (blitline_c ? 0x20 : (blitfill_c ? 0x10 : 0)));
}
}
if (memwatch_enabled) {
if (reg == 0) {
uae_u32 mask = MW_MASK_BLITTER_D_N;
if (blitfill_c)
mask = MW_MASK_BLITTER_D_F;
if (blitline_c)
mask = MW_MASK_BLITTER_D_L;
debug_putpeekdma_chipram(addr, v, mask, reg, 0x054);
} else if (reg == 0x70) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_C, reg, 0x48);
} else if (reg == 0x72) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_B, reg, 0x4c);
} else if (reg == 0x74) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_A, reg, 0x52);
}
}
#endif
}
static void blitter_debugsave(int copper, uaecptr pc)
{
debug_bltcon0 = bltcon0;
debug_bltcon1 = bltcon1;
debug_bltsizev = blt_info.vblitsize;
debug_bltsizeh = blt_info.hblitsize;
debug_bltapt = bltapt;
debug_bltbpt = bltbpt;
debug_bltcpt = bltcpt;
debug_bltdpt = bltdpt;
debug_bltadat = blt_info.bltadat;
debug_bltbdat = blt_info.bltbdat;
debug_bltcdat = blt_info.bltcdat;
debug_bltamod = blt_info.bltamod;
debug_bltbmod = blt_info.bltbmod;
debug_bltcmod = blt_info.bltcmod;
debug_bltdmod = blt_info.bltdmod;
debug_bltafwm = blt_info.bltafwm;
debug_bltalwm = blt_info.bltalwm;
debug_bltpc = pc;
debug_bltcop = copper;
}
static void blitter_dump (void)
{
int chipsize = currprefs.chipmem.size;
console_out_f(_T("PT A=%08X B=%08X C=%08X D=%08X\n"), bltapt, bltbpt, bltcpt, bltdpt);
console_out_f(_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"),
bltcon0, bltcon1, blt_info.bltadat, blt_info.bltbdat, blt_info.bltcdat);
console_out_f(_T("AFWM=%04X ALWM=%04X MOD A=%04X B=%04X C=%04X D=%04X\n"),
blt_info.bltafwm, blt_info.bltalwm,
blt_info.bltamod & 0xffff, blt_info.bltbmod & 0xffff, blt_info.bltcmod & 0xffff, blt_info.bltdmod & 0xffff);
console_out_f(_T("PC=%08X DMA=%d\n"), m68k_getpc(), dmaen (DMA_BLITTER));
if (((bltcon0 & 0x800) && bltapt >= chipsize) || ((bltcon0 & 0x400) && bltbpt >= chipsize) ||
((bltcon0 & 0x200) && bltcpt >= chipsize) || ((bltcon0 & 0x100) && bltdpt >= chipsize))
console_out_f(_T("PT outside of chipram\n"));
}
void blitter_debugdump(void)
{
console_out(_T("Blitter registers at start:\n"));
console_out_f(_T("PT A=%08X B=%08X C=%08X D=%08X\n"), debug_bltapt, debug_bltbpt, debug_bltcpt, debug_bltdpt);
console_out_f(_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"),
debug_bltcon0, debug_bltcon1, debug_bltadat, debug_bltbdat, debug_bltcdat);
console_out_f(_T("AFWM=%04X ALWM=%04X MOD A=%04X B=%04X C=%04X D=%04X\n"),
debug_bltafwm, debug_bltalwm, debug_bltamod, debug_bltbmod, debug_bltcmod, debug_bltdmod);
console_out_f(_T("COP=%d PC=%08X\n"), debug_bltcop, debug_bltpc);
console_out(_T("Blitter registers now:\n"));
blitter_dump();
}
static void markidlecycle(int hpos)
{
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITSTARTFINISH, hpos, vpos);
}
}
static void check_channel_mods(int hpos, int ch, uaecptr *pt)
{
static int blit_warned = 100;
if (bltptxpos < 0)
return;
if (bltptxpos != hpos)
return;
// if CPU write and non-CE: skip
if (bltptxc < 0) {
if (currprefs.cpu_model >= 68020 || !currprefs.cpu_cycle_exact) {
bltptxpos = -1;
return;
}
}
if (ch == bltptxc || ch == -bltptxc) {
if (blit_warned > 0) {
write_log(_T("BLITTER: %08X -> %08X write to %cPT ignored! %08x\n"), bltptx, *pt, ch + 'A' - 1, m68k_getpc());
blit_warned--;
}
bltptxpos = -1;
*pt = bltptx;
}
}
// blitter interrupt is set (and busy bit cleared) when
// last "main" cycle has been finished, any non-linedraw
// D-channel blit still needs 2 more cycles before final
// D is written (idle cycle, final D write)
//
// According to schematics, AGA has workaround delay circuit
// that adds 2 extra cycles if D is enabled and not line mode.
//
// line draw interrupt triggers when last D is written
// (or cycle where last D write would have been if
// ONEDOT was active)
static void blitter_interrupt(void)
{
if (blt_info.blit_interrupt) {
return;
}
blt_info.blit_interrupt = 1;
send_interrupt(6, (4 + 1) * CYCLE_UNIT);
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITIRQ, current_hpos(), vpos);
}
}
static void blitter_end(void)
{
blt_info.blit_main = 0;
blt_info.blit_finald = 0;
blt_info.blit_queued = 0;
event2_remevent(ev2_blitter);
unset_special(SPCFLAG_BLTNASTY);
if (log_blitter & 1) {
write_log(_T("cycles %d, missed %d, total %d\n"),
blit_totalcyclecounter, blit_misscyclecounter, blit_totalcyclecounter + blit_misscyclecounter);
}
blt_info.blitter_dangerous_bpl = 0;
}
static void blitter_done_all(int hpos)
{
blt_info.blit_main = 0;
blt_info.blit_finald = 0;
if (m68k_interrupt_delay && hpos >= 0) {
blt_info.finishhpos = (hpos + 1) % maxhpos;
} else {
blt_info.finishhpos = -1;
}
blitter_interrupt();
blitter_done_notify(blitline);
if (!blt_info.blit_queued && !blt_info.blit_finald) {
blitter_end();
}
}
static void blitter_done_except_d(void)
{
blt_info.blit_main = 0;
blitter_interrupt();
blitter_done_notify(blitline);
}
STATIC_INLINE void chipmem_agnus_wput2 (uaecptr addr, uae_u32 w)
{
if (!(log_blitter & 4)) {
if (!blit_dof) {
debug_putpeekdma_chipram(addr, w, MW_MASK_BLITTER_D_N, 0x000, 0x054);
chipmem_wput_indirect(addr, w);
}
regs.chipset_latch_rw = w;
}
}
static void blitter_dofast (void)
{
int i,j;
uaecptr bltadatptr = 0, bltbdatptr = 0, bltcdatptr = 0, bltddatptr = 0;
uae_u8 mt = bltcon0 & 0xFF;
uae_u16 ashift = bltcon0 >> 12;
uae_u16 bshift = bltcon1 >> 12;
blit_masktable[0] = blt_info.bltafwm;
blit_masktable[blt_info.hblitsize - 1] &= blt_info.bltalwm;
if (bltcon0 & 0x800) {
bltadatptr = bltapt;
bltapt += (blt_info.hblitsize * 2 + blt_info.bltamod) * blt_info.vblitsize;
}
if (bltcon0 & 0x400) {
bltbdatptr = bltbpt;
bltbpt += (blt_info.hblitsize * 2 + blt_info.bltbmod) * blt_info.vblitsize;
}
if (bltcon0 & 0x200) {
bltcdatptr = bltcpt;
bltcpt += (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize;
}
if (bltcon0 & 0x100) {
bltddatptr = bltdpt;
bltdpt += (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize;
}
#if SPEEDUP
if (blitfunc_dofast[mt] && !blitfill) {
(*blitfunc_dofast[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info);
} else
#endif
{
uae_u32 blitbhold = blt_info.bltbhold;
int ashift = bltcon0 >> 12;
int bshift = bltcon1 >> 12;
uaecptr dstp = 0;
int dodst = 0;
for (j = 0; j < blt_info.vblitsize; j++) {
blitfc = !!(bltcon1 & 0x4);
for (i = 0; i < blt_info.hblitsize; i++) {
uae_u32 bltadat, blitahold;
if (bltadatptr) {
blt_info.bltadat = bltadat = chipmem_wget_indirect (bltadatptr);
bltadatptr += 2;
} else
bltadat = blt_info.bltadat;
bltadat &= blit_masktable[i];
blitahold = (((uae_u32)blt_info.bltaold << 16) | bltadat) >> ashift;
blt_info.bltaold = bltadat;
if (bltbdatptr) {
uae_u16 bltbdat = chipmem_wget_indirect (bltbdatptr);
bltbdatptr += 2;
blitbhold = (((uae_u32)blt_info.bltbold << 16) | bltbdat) >> bshift;
blt_info.bltbold = bltbdat;
blt_info.bltbdat = bltbdat;
}
if (bltcdatptr) {
blt_info.bltcdat = chipmem_wget_indirect (bltcdatptr);
bltcdatptr += 2;
}
if (dodst)
chipmem_agnus_wput2 (dstp, blt_info.bltddat);
blt_info.bltddat = blit_func (blitahold, blitbhold, blt_info.bltcdat, mt) & 0xFFFF;
if (blitfill) {
uae_u16 d = blt_info.bltddat;
int ifemode = blitife ? 2 : 0;
int fc1 = blit_filltable[d & 255][ifemode + blitfc][1];
blt_info.bltddat = (blit_filltable[d & 255][ifemode + blitfc][0]
+ (blit_filltable[d >> 8][ifemode + fc1][0] << 8));
blitfc = blit_filltable[d >> 8][ifemode + fc1][1];
}
if (blt_info.bltddat)
blt_info.blitzero = 0;
if (bltddatptr) {
dodst = 1;
dstp = bltddatptr;
bltddatptr += 2;
}
}
if (bltadatptr)
bltadatptr += blt_info.bltamod;
if (bltbdatptr)
bltbdatptr += blt_info.bltbmod;
if (bltcdatptr)
bltcdatptr += blt_info.bltcmod;
if (bltddatptr)
bltddatptr += blt_info.bltdmod;
}
if (dodst)
chipmem_agnus_wput2 (dstp, blt_info.bltddat);
blt_info.bltbhold = blitbhold;
}
blit_masktable[0] = 0xFFFF;
blit_masktable[blt_info.hblitsize - 1] = 0xFFFF;
blt_info.blit_main = 0;
}
static void blitter_dofast_desc (void)
{
int i,j;
uaecptr bltadatptr = 0, bltbdatptr = 0, bltcdatptr = 0, bltddatptr = 0;
uae_u8 mt = bltcon0 & 0xFF;
uae_u16 ashift = 16 - (bltcon0 >> 12);
uae_u16 bshift = 16 - (bltcon1 >> 12);
blit_masktable[0] = blt_info.bltafwm;
blit_masktable[blt_info.hblitsize - 1] &= blt_info.bltalwm;
if (bltcon0 & 0x800) {
bltadatptr = bltapt;
bltapt -= (blt_info.hblitsize * 2 + blt_info.bltamod) * blt_info.vblitsize;
}
if (bltcon0 & 0x400) {
bltbdatptr = bltbpt;
bltbpt -= (blt_info.hblitsize * 2 + blt_info.bltbmod) * blt_info.vblitsize;
}
if (bltcon0 & 0x200) {
bltcdatptr = bltcpt;
bltcpt -= (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize;
}
if (bltcon0 & 0x100) {
bltddatptr = bltdpt;
bltdpt -= (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize;
}
#if SPEEDUP
if (blitfunc_dofast_desc[mt] && !blitfill) {
(*blitfunc_dofast_desc[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info);
} else
#endif
{
uae_u32 blitbhold = blt_info.bltbhold;
uaecptr dstp = 0;
int dodst = 0;
for (j = 0; j < blt_info.vblitsize; j++) {
blitfc = !!(bltcon1 & 0x4);
for (i = 0; i < blt_info.hblitsize; i++) {
uae_u32 bltadat, blitahold;
if (bltadatptr) {
bltadat = blt_info.bltadat = chipmem_wget_indirect (bltadatptr);
bltadatptr -= 2;
} else
bltadat = blt_info.bltadat;
bltadat &= blit_masktable[i];
blitahold = (((uae_u32)bltadat << 16) | blt_info.bltaold) >> ashift;
blt_info.bltaold = bltadat;
if (bltbdatptr) {
uae_u16 bltbdat = chipmem_wget_indirect (bltbdatptr);
bltbdatptr -= 2;
blitbhold = (((uae_u32)bltbdat << 16) | blt_info.bltbold) >> bshift;
blt_info.bltbold = bltbdat;
blt_info.bltbdat = bltbdat;
}
if (bltcdatptr) {
blt_info.bltcdat = blt_info.bltbdat = chipmem_wget_indirect (bltcdatptr);
bltcdatptr -= 2;
}
if (dodst)
chipmem_agnus_wput2 (dstp, blt_info.bltddat);
blt_info.bltddat = blit_func (blitahold, blitbhold, blt_info.bltcdat, mt) & 0xFFFF;
if (blitfill) {
uae_u16 d = blt_info.bltddat;
int ifemode = blitife ? 2 : 0;
int fc1 = blit_filltable[d & 255][ifemode + blitfc][1];
blt_info.bltddat = (blit_filltable[d & 255][ifemode + blitfc][0]
+ (blit_filltable[d >> 8][ifemode + fc1][0] << 8));
blitfc = blit_filltable[d >> 8][ifemode + fc1][1];
}
if (blt_info.bltddat)
blt_info.blitzero = 0;
if (bltddatptr) {
dstp = bltddatptr;
dodst = 1;
bltddatptr -= 2;
}
}
if (bltadatptr)
bltadatptr -= blt_info.bltamod;
if (bltbdatptr)
bltbdatptr -= blt_info.bltbmod;
if (bltcdatptr)
bltcdatptr -= blt_info.bltcmod;
if (bltddatptr)
bltddatptr -= blt_info.bltdmod;
}
if (dodst)
chipmem_agnus_wput2 (dstp, blt_info.bltddat);
blt_info.bltbhold = blitbhold;
}
blit_masktable[0] = 0xFFFF;
blit_masktable[blt_info.hblitsize - 1] = 0xFFFF;
blt_info.blit_main = 0;
}
static void blitter_line_read(void)
{
if (bltcon0 & 0x400) {
// B (normally not enabled)
record_dma_blit(0x72, 0, bltbpt, last_blitter_hpos);
blt_info.bltbdat = chipmem_wget_indirect(bltbpt);
regs.chipset_latch_rw = blt_info.bltbdat;
record_dma_blit_val(blt_info.bltbdat);
bltbpt += blt_info.bltbmod;
}
if (bltcon0 & 0x200) {
// C
record_dma_blit(0x70, 0, bltcpt, last_blitter_hpos);
blt_info.bltcdat = chipmem_wget_indirect(bltcpt);
regs.chipset_latch_rw = blt_info.bltcdat;
record_dma_blit_val(blt_info.bltcdat);
}
}
static void blitter_line_write(void)
{
/* D-channel state has no effect on linedraw, but C must be enabled or nothing is drawn! */
if (bltcon0 & 0x200) {
chipmem_wput_indirect(bltdpt, blt_info.bltddat);
regs.chipset_latch_rw = blt_info.bltddat;
}
}
static void blitter_line_incx(void)
{
uae_u16 ashift = bltcon0 >> 12;
if (++ashift == 16) {
ashift = 0;
bltcpt += 2;
}
bltcon0 &= 0x0fff;
bltcon0 |= ashift << 12;
}
static void blitter_line_decx(void)
{
uae_u16 ashift = bltcon0 >> 12;
if (ashift-- == 0) {
ashift = 15;
bltcpt -= 2;
}
bltcon0 &= 0x0fff;
bltcon0 |= ashift << 12;
}
static void blitter_line_decy(void)
{
if (bltcon0 & 0x0200) {
bltcpt -= blt_info.bltcmod;
}
blitonedot = 0;
}
static void blitter_line_incy(void)
{
if (bltcon0 & 0x0200) {
bltcpt += blt_info.bltcmod;
}
blitonedot = 0;
}
static void blitter_line(void)
{
int ashift = bltcon0 >> 12;
int bshift = bltcon1 >> 12;
uae_u16 blitahold = (blinea & blt_info.bltafwm) >> ashift;
uae_u16 blitchold = blt_info.bltcdat;
if (bltcon0 & 0x400) {
// B special case if enabled
blineb = (((uae_u32)blt_info.bltbold << 16) | blt_info.bltbdat) >> bshift;
}
blt_info.bltbhold = (blineb & 0x0001) ? 0xFFFF : 0;
blitlinepixel = !(bltcon1 & BLTSING) || ((bltcon1 & BLTSING) && !blitonedot);
blt_info.bltddat = blit_func(blitahold, blt_info.bltbhold, blitchold, bltcon0 & 0xFF);
blitonedot++;
blt_info.bltaold = (((uae_u32)blt_info.bltaold << 16) | (blinea & blt_info.bltafwm)) >> ashift;
}
static void blitter_line_proc (void)
{
if (!(bltcon1 & BLTSIGN)) {
if (bltcon1 & 0x10) {
if (bltcon1 & 0x8)
blitter_line_decy();
else
blitter_line_incy();
} else {
if (bltcon1 & 0x8)
blitter_line_decx();
else
blitter_line_incx();
}
}
if (bltcon1 & 0x10) {
if (bltcon1 & 0x4)
blitter_line_decx();
else
blitter_line_incx();
} else {
if (bltcon1 & 0x4)
blitter_line_decy();
else
blitter_line_incy();
}
if (bltcon0 & 0x800) {
if (bltcon1 & BLTSIGN)
bltapt += (uae_s16)blt_info.bltbmod;
else
bltapt += (uae_s16)blt_info.bltamod;
}
bool blitsign = 0 > (uae_s16)bltapt;
if (blitsign) {
bltcon1 |= BLTSIGN;
} else {
bltcon1 &= ~BLTSIGN;
}
if (blt_info.bltddat)
blt_info.blitzero = 0;
}
static void blitter_nxline (void)
{
int bshift = bltcon1 >> 12;
bshift--;
bshift &= 15;
blineb = (blt_info.bltbdat >> bshift) | (blt_info.bltbdat << (16 - bshift));
bltcon1 &= 0x0fff;
bltcon1 |= bshift << 12;
}
static void actually_do_blit (void)
{
if (blitline) {
do {
blitter_line_read();
if (ddat1use) {
bltdpt = bltcpt;
}
ddat1use = 1;
blitter_line();
blitter_line_proc();
blitter_nxline();
blt_info.vblitsize--;
if (blitlinepixel) {
record_dma_blit(0x00, blt_info.bltddat, bltdpt, last_blitter_hpos);
blitter_line_write();
blitlinepixel = 0;
}
} while (blt_info.vblitsize != 0);
bltdpt = bltcpt;
} else {
if (blitdesc)
blitter_dofast_desc();
else
blitter_dofast();
}
blt_info.blit_main = 0;
}
static void blitter_doit (int hpos)
{
if (blt_info.vblitsize == 0 || (blitline && blt_info.hblitsize != 2)) {
blitter_done_all(hpos);
return;
}
actually_do_blit();
blitter_done_all(hpos);
}
static int makebliteventtime(int delay)
{
if (delay) {
delay += delay - (int)(delay * (1 + currprefs.blitter_speed_throttle) + 0.5);
if (delay <= 0)
delay = 1;
}
return delay;
}
void blitter_handler(uae_u32 data)
{
static int blitter_stuck;
if (!dmaen (DMA_BLITTER)) {
event2_newevent (ev2_blitter, 10, 0);
blitter_stuck++;
if (blitter_stuck < 20000 || !immediate_blits)
return; /* gotta come back later. */
/* "free" blitter in immediate mode if it has been "stuck" ~3 frames
* fixes some JIT game incompatibilities
*/
debugtest (DEBUGTEST_BLITTER, _T("force-unstuck!\n"));
}
blitter_stuck = 0;
if (blit_slowdown > 0 && !immediate_blits) {
event2_newevent (ev2_blitter, makebliteventtime(blit_slowdown), 0);
blit_slowdown = -1;
return;
}
blitter_doit(-1);
}
#ifdef CPUEMU_13
static bool blitshifterdebug(uae_u16 con0, bool check)
{
int cnt = 0;
for (int i = 0; i < 4; i++) {
if (shifter[i]) {
cnt++;
}
}
if (cnt != 1 || !check) {
write_log(_T("Blitter shifter bits %d: CH=%c%c%c%c (%d-%d-%d-%d O=%d) PC=%08x\n"),
cnt,
((con0 >> 11) & 1) ? 'A' : '-', ((con0 >> 10) & 1) ? 'B' : '-', ((con0 >> 9) & 1) ? 'C' : '-', ((con0 >> 8) & 1) ? 'D' : '-',
shifter[0], shifter[1], shifter[2], shifter[3], shifter_out, M68K_GETPC);
return true;
}
return false;
}
static void blit_bltset(int con)
{
static int blit_warned = 100;
bool blit_changed = false;
uae_u16 con0_old = bltcon0_old;
if (con & 2) {
blitdesc = bltcon1 & 2;
if (blit_warned > 0) {
if ((bltcon1 & 1) && !blitline_started) {
write_log(_T("BLITTER: linedraw enabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
//activate_debugger();
} else if (!(bltcon1 & 1) && blitline_started) {
write_log(_T("BLITTER: linedraw disabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
//activate_debugger();
}
if ((bltcon1 & 0x18) && !(bltcon1_old & 0x18)) {
write_log(_T("BLITTER: fill enabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
//activate_debugger();
} else if (!(bltcon1 & 0x18) && (bltcon1_old & 0x18)) {
write_log(_T("BLITTER: fill disabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
//activate_debugger();
}
}
}
if (!savestate_state && blt_info.blit_main && (bltcon0_old != bltcon0 || bltcon1_old != bltcon1)) {
blit_changed = true;
if (blit_warned > 0) {
write_log(_T("BLITTER: BLTCON0 %04x -> %04x BLTCON1 %04x -> %04x PC=%08x (%d %d)\n"), bltcon0_old, bltcon0, bltcon1_old, bltcon1, M68K_GETPC, current_hpos(), vpos);
//blitter_dump();
blitshifterdebug(bltcon0_old, false);
blit_warned--;
//activate_debugger();
}
bltcon0_old = bltcon0;
bltcon1_old = bltcon1;
//activate_debugger();
}
blit_ch = (bltcon0 & 0x0f00) >> 8;
blitline = bltcon1 & 1;
blit_ovf = (bltcon1 & 0x20) != 0;
blitfill_idle = false;
shifter_skip_b = (bltcon0 & 0x400) == 0;
if (blitline) {
shifter_skip_y = true;
blitfill = 0;
shifter_out = shifter_skip_y ? shifter[2] : shifter[3];
} else {
int oldfill = blitfill;
blitfill = (bltcon1 & 0x18) != 0;
blitfc = !!(bltcon1 & 0x4);
blitife = !!(bltcon1 & 0x8);
if ((bltcon1 & 0x18) == 0x18) {
debugtest(DEBUGTEST_BLITTER, _T("weird fill mode\n"));
blitife = 0;
}
if (blitfill && !blitdesc) {
debugtest(DEBUGTEST_BLITTER, _T("fill without desc\n"));
if (log_blitter & 16) {
activate_debugger();
}
}
shifter_skip_y = (bltcon0 & (0x100 | 0x200)) != 0x300;
// fill mode idle cycle needed? (D enabled but C not enabled)
if (blitfill && (bltcon0 & (0x100 | 0x200)) == 0x100) {
shifter_skip_y = false;
blitfill_idle = true;
}
shifter_out = shifter_skip_y ? shifter[2] : shifter[3];
}
blit_cyclecount = 4 - (shifter_skip_b + shifter_skip_y);
blit_dmacount = ((bltcon0 & 0x800) ? 1 : 0) + ((bltcon0 & 0x400) ? 1 : 0) +
((bltcon0 & 0x200) ? 1 : 0) + (((bltcon0 & 0x100) && !blitline) ? 1 : 0);
if (blt_info.blit_main || blt_info.blit_pending) {
blitfill_c = blitfill;
blitline_c = blitline;
}
blit_dof = 0;
if ((bltcon1 & 0x80) && ecs_agnus) {
blit_dof = 1;
debugtest(DEBUGTEST_BLITTER, _T("ECS BLTCON1 DOFF-bit set\n"));