From 4cfb8e2d2449bd1470d7f9e81b80dcebf15d65e3 Mon Sep 17 00:00:00 2001 From: James Craddock-Jones Date: Tue, 13 Aug 2024 17:48:38 +0100 Subject: [PATCH] Add FIVR voltage and power balance control for Intel CPUs --- .../Scripts/PremadePresets.cs | 10 +- .../Scripts/RyzenAdj_To_UXTU.cs | 8 +- .../Services/PresetManager.cs | 11 ++ .../Views/Pages/CustomPresets.xaml | 156 +++++++++++++++++- .../Views/Pages/CustomPresets.xaml.cs | 32 +++- 5 files changed, 208 insertions(+), 9 deletions(-) diff --git a/Universal x86 Tuning Utility/Scripts/PremadePresets.cs b/Universal x86 Tuning Utility/Scripts/PremadePresets.cs index b8dc7d2..87882c2 100644 --- a/Universal x86 Tuning Utility/Scripts/PremadePresets.cs +++ b/Universal x86 Tuning Utility/Scripts/PremadePresets.cs @@ -182,7 +182,7 @@ public static void SetPremadePresets() { EcoPreset = "--tctl-temp=95 --ppt-limit=65000 --edc-limit=90000 --tdc-limit=90000 "; BalPreset = "--tctl-temp=95 --ppt-limit=95000 --edc-limit=130000 --tdc-limit=130000 "; - PerformancePreset = "--tctl-temp=95 --ppt-limit=125000 --edc-limit=142 --tdc-limit=142000 "; + PerformancePreset = "--tctl-temp=95 --ppt-limit=125000 --edc-limit=142000 --tdc-limit=142000 "; ExtremePreset = "--tctl-temp=95 --ppt-limit=170000 --edc-limit=230000 --tdc-limit=230000 "; } else if (cpuName.Contains("X")) @@ -194,10 +194,10 @@ public static void SetPremadePresets() } else { - EcoPreset = "--tctl-temp=95 --ppt-limit=45 --edc-limit=90 --tdc-limit=90 "; - BalPreset = "--tctl-temp=95 --ppt-limit=65 --edc-limit=90 --tdc-limit=90 "; - PerformancePreset = "--tctl-temp=95 --ppt-limit=88 --edc-limit=125 --tdc-limit=125 "; - ExtremePreset = "--tctl-temp=95 --ppt-limit=105 --edc-limit=142 --tdc-limit=142 "; + EcoPreset = "--tctl-temp=95 --ppt-limit=45000 --edc-limit=90000 --tdc-limit=90000 "; + BalPreset = "--tctl-temp=95 --ppt-limit=65000 --edc-limit=90000 --tdc-limit=90000 "; + PerformancePreset = "--tctl-temp=95 --ppt-limit=88000 --edc-limit=125000 --tdc-limit=125000 "; + ExtremePreset = "--tctl-temp=95 --ppt-limit=105000 --edc-limit=142000 --tdc-limit=142000 "; } } else diff --git a/Universal x86 Tuning Utility/Scripts/RyzenAdj_To_UXTU.cs b/Universal x86 Tuning Utility/Scripts/RyzenAdj_To_UXTU.cs index bdd1c58..21a562f 100644 --- a/Universal x86 Tuning Utility/Scripts/RyzenAdj_To_UXTU.cs +++ b/Universal x86 Tuning Utility/Scripts/RyzenAdj_To_UXTU.cs @@ -24,7 +24,7 @@ internal class RyzenAdj_To_UXTU [DllImport("powrprof.dll", EntryPoint = "PowerSetActiveOverlayScheme")] public static extern uint PowerSetActiveOverlayScheme(Guid OverlaySchemeGuid); - static string balancedPowerScheme = "3af9B8d9-7c97-431d-ad78-34a8bfea439f"; + static string balancedPowerScheme = "00000000-0000-0000-0000-000000000000"; static string highPerformancePowerScheme = "DED574B5-45A0-4F42-8737-46345C09C238"; static string powerSaverPowerScheme = "961CC777-2547-4F9D-8174-7D86181b8A7A"; @@ -91,6 +91,12 @@ await Task.Run(() => int ryzenAdjCommandValue = Convert.ToInt32(ryzenAdjCommandValueString); if (ryzenAdjCommandString == "intel-pl") Intel_Management.changeTDPAll(ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-volt-cpu") Intel_Management.changeVoltageOffset(0, ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-volt-gpu") Intel_Management.changeVoltageOffset(1, ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-volt-cache") Intel_Management.changeVoltageOffset(2, ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-volt-sa") Intel_Management.changeVoltageOffset(3, ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-bal-cpu") Intel_Management.changePowerBalance(0, ryzenAdjCommandValue); + else if (ryzenAdjCommandString == "intel-bal-gpu") Intel_Management.changePowerBalance(1, ryzenAdjCommandValue); //else if (ryzenAdjCommandString == "power-limit-1") TDP_Management.changePL1(ryzenAdjCommandValue); //else if (ryzenAdjCommandString == "power-limit-2") TDP_Management.changePL2(ryzenAdjCommandValue); } diff --git a/Universal x86 Tuning Utility/Services/PresetManager.cs b/Universal x86 Tuning Utility/Services/PresetManager.cs index 0c20cfa..8c14fc0 100644 --- a/Universal x86 Tuning Utility/Services/PresetManager.cs +++ b/Universal x86 Tuning Utility/Services/PresetManager.cs @@ -38,6 +38,17 @@ public class Preset public int IntelPL1 { get; set; } public int IntelPL2 { get; set; } + + public bool IsIntelVolt { get; set; } + public int IntelVoltCPU { get; set; } + public int IntelVoltGPU { get; set; } + public int IntelVoltCache { get; set; } + public int IntelVoltSA { get; set; } + + public bool IsIntelBal { get; set; } + public int IntelBalCPU { get; set; } + public int IntelBalGPU { get; set; } + public int rsr { get; set; } public int boost { get; set; } public int imageSharp { get; set; } diff --git a/Universal x86 Tuning Utility/Views/Pages/CustomPresets.xaml b/Universal x86 Tuning Utility/Views/Pages/CustomPresets.xaml index f9d9c04..6e31ae9 100644 --- a/Universal x86 Tuning Utility/Views/Pages/CustomPresets.xaml +++ b/Universal x86 Tuning Utility/Views/Pages/CustomPresets.xaml @@ -1018,7 +1018,7 @@ VerticalAlignment="Center" SelectedIndex="0" MinWidth="138" Name="cbxResScale" H + Text="Provides the ability to tune your NVIDIA GPU."/> @@ -1080,6 +1080,160 @@ VerticalAlignment="Center" SelectedIndex="0" MinWidth="138" Name="cbxResScale" H Text="Warning: We are not liable for any damages to hardware or resulting instabilities caused by adjustment of frequencies and voltages." TextWrapping="WrapWithOverflow" Margin="0,8,0,0"/> + + + + + + + + + + + + + + + + + + + + + + CPU Balance + + + + + + + + + + + + + + + GPU Balance + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Core Offset (mV) + + + + + + + + + + + + + + + iGPU Offset (mV) + + + + + + + + + + + + + + + Cache Offset (mV) + + + + + + + + + + + + + + + System Agent Offset (mV) + + + + + + + + + + + + + + + Family.RyzenFamily.Renoir) sdAmdPBO.Visibility = Visibility.Collapsed; if(SystemInformation.PowerStatus.BatteryChargeStatus != BatteryChargeStatus.NoSystemBattery) sdAmdCpuTune.Visibility = Visibility.Collapsed; @@ -109,13 +112,14 @@ public CustomPresets() sdAmdCCD1CO.Visibility = sdAmdCO.Visibility; - if (Family.FAM < Family.RyzenFamily.DragonRange) + if (Family.FAM < Family.RyzenFamily.Renoir) { sdAmdPowerProfile.Visibility = Visibility.Collapsed; sdAmdCO.Visibility = Visibility.Collapsed; - if (Family.CPUName.Contains("Ryzen 9")) sdAmdCCD2CO.Visibility = sdAmdCO.Visibility; } + if (Family.FAM == Family.RyzenFamily.DragonRange) if (Family.CPUName.Contains("Ryzen 9")) sdAmdCCD2CO.Visibility = sdAmdCO.Visibility; + // Get the names of all the stored presets IEnumerable presetNames = apuPresetManager.GetPresetNames(); @@ -132,6 +136,9 @@ public CustomPresets() sdAmdApuThermal.Visibility = Visibility.Collapsed; sdAmdApuVRM.Visibility = Visibility.Collapsed; sdIntelCPU.Visibility = Visibility.Collapsed; + sdIntelUV.Visibility = Visibility.Collapsed; + sdIntelBal.Visibility = Visibility.Collapsed; + sdAmdApuiGPUClk.Visibility = Visibility.Collapsed; sdAmdPowerProfile.Visibility = Visibility.Collapsed; @@ -542,6 +549,12 @@ private void btnSave_Click(object sender, RoutedEventArgs e) { IntelPL1 = (int)nudIntelPL1.Value, IntelPL2 = (int)nudIntelPL2.Value, + IntelVoltCPU = (int)nudIntelCoreUV.Value, + IntelVoltGPU = (int)nudIntelGfxUV.Value, + IntelVoltCache = (int)nudIntelCacheUV.Value, + IntelVoltSA = (int)nudIntelSAUV.Value, + IntelBalCPU = (int)nudIntelCpuBal.Value, + IntelBalGPU = (int)nudIntelGpuBal.Value, rsr = (int)nudRSR.Value, boost = (int)nudBoost.Value, @@ -557,6 +570,8 @@ private void btnSave_Click(object sender, RoutedEventArgs e) isIntelPL1 = (bool)cbIntelPL1.IsChecked, isIntelPL2 = (bool)cbIntelPL2.IsChecked, + IsIntelVolt = (bool)tsIntelUV.IsChecked, + IsIntelBal = (bool)tsIntelBal.IsChecked, isNVIDIA = (bool)tsNV.IsChecked, nvMaxCoreClk = (int)nudNVMaxCore.Value, @@ -971,6 +986,17 @@ public void updateValues(string preset) cbAutoCap.IsChecked = myPreset.isRecap; nudSharp.Value = myPreset.Sharpness; cbxResScale.SelectedIndex = myPreset.ResScaleIndex; + + tsIntelUV.IsChecked = myPreset.IsIntelVolt; + nudIntelCoreUV.Value = myPreset.IntelVoltCPU; + nudIntelGfxUV.Value = myPreset.IntelVoltGPU; + nudIntelCacheUV.Value = myPreset.IntelVoltCache; + nudIntelSAUV.Value = myPreset.IntelVoltSA; + + tsIntelBal.IsChecked = myPreset.IsIntelBal; + nudIntelCpuBal.Value = myPreset.IntelBalCPU; + nudIntelGpuBal.Value = myPreset.IntelBalGPU; + } } Garbage.Garbage_Collect(); @@ -1170,6 +1196,8 @@ public string getCommandValues() { if (cbIntelPL1.IsChecked == true) commandValues = commandValues + $"--intel-pl={nudIntelPL1.Value} "; if (cbIntelPL2.IsChecked == true) commandValues = commandValues + $"--power-limit-2={nudIntelPL2.Value} "; + if (tsIntelUV.IsChecked == true) commandValues = commandValues + $"--intel-volt-cpu={nudIntelCoreUV.Value} --intel-volt-gpu={nudIntelGfxUV.Value} --intel-volt-cache={nudIntelCacheUV.Value} --intel-volt-cpu={nudIntelSAUV.Value} "; + if (tsIntelBal.IsChecked == true) commandValues = commandValues + $"--intel-bal-cpu={nudIntelCpuBal.Value} --intel-bal-gpu={nudIntelGpuBal.Value} "; } if (tsRadeonGraph.IsChecked == true)