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danielschwierzeckdanielschwierzeck
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MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig
This converts the following to Kconfig: CONFIG_SYS_MIPS_TIMER_REQ Signed-off-by: Daniel Schwierzeck <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
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71 files changed

+61
-68
lines changed

‎arch/mips/Kconfig

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ choice
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config TARGET_MALTA
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bool "Support malta"
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select HAS_FIXED_TIMER_FREQUENCY
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select BOARD_EARLY_INIT_R
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select DM
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select DM_SERIAL
@@ -41,17 +42,20 @@ config TARGET_MALTA
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config ARCH_ATH79
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bool "Support QCA/Atheros ath79"
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select HAS_FIXED_TIMER_FREQUENCY
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select DM
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select OF_CONTROL
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imply CMD_DM
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config ARCH_MSCC
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bool "Support MSCC VCore-III"
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select HAS_FIXED_TIMER_FREQUENCY
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select OF_CONTROL
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select DM
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config ARCH_BMIPS
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bool "Support BMIPS SoCs"
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select HAS_FIXED_TIMER_FREQUENCY
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select CLK
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select CPU
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select DM
@@ -62,6 +66,7 @@ config ARCH_BMIPS
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config ARCH_MTMIPS
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bool "Support MediaTek MIPS platforms"
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select HAS_FIXED_TIMER_FREQUENCY
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select CLK
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imply CMD_DM
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select DISPLAY_CPUINFO
@@ -88,6 +93,7 @@ config ARCH_MTMIPS
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config ARCH_JZ47XX
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bool "Support Ingenic JZ47xx"
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select SUPPORT_SPL
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select HAS_FIXED_TIMER_FREQUENCY
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select OF_CONTROL
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select DM
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@@ -116,12 +122,14 @@ config ARCH_OCTEON
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config MACH_PIC32
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bool "Support Microchip PIC32"
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select HAS_FIXED_TIMER_FREQUENCY
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select DM
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select OF_CONTROL
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imply CMD_DM
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config TARGET_BOSTON
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bool "Support Boston"
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select HAS_FIXED_TIMER_FREQUENCY
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select DM
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imply DM_EVENT
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select DM_SERIAL
@@ -143,6 +151,7 @@ config TARGET_BOSTON
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config TARGET_XILFPGA
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bool "Support Imagination Xilfpga"
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select HAS_FIXED_TIMER_FREQUENCY
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select DM
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select DM_ETH
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select DM_GPIO
@@ -246,6 +255,12 @@ config ROM_EXCEPTION_VECTORS
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Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
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In that case the image size will be reduced by 0x500 bytes.
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config SYS_MIPS_TIMER_FREQ
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int "Fixed MIPS CPU timer frequency in Hz"
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depends on HAS_FIXED_TIMER_FREQUENCY
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help
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Configures a fixed CPU timer frequency.
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config MIPS_CM_BASE
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hex "MIPS CM GCR Base Address"
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depends on MIPS_CM
@@ -427,6 +442,9 @@ config SUPPORTS_CPU_MIPS64_R6
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config SUPPORTS_CPU_MIPS64_OCTEON
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bool
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config HAS_FIXED_TIMER_FREQUENCY
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bool
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config CPU_CAVIUM_OCTEON
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bool
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‎configs/ap121_defconfig

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Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=25000000
1111
CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_SYS_LOAD_ADDR=0x81000000
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CONFIG_ARCH_ATH79=y
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CONFIG_SYS_MIPS_TIMER_FREQ=200000000
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CONFIG_DEBUG_UART=y
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CONFIG_SYS_MEMTEST_START=0x80100000
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CONFIG_SYS_MEMTEST_END=0x83f00000

‎configs/ap143_defconfig

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Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_SYS_LOAD_ADDR=0x81000000
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CONFIG_ARCH_ATH79=y
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CONFIG_TARGET_AP143=y
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CONFIG_SYS_MIPS_TIMER_FREQ=325000000
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CONFIG_DEBUG_UART=y
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CONFIG_SYS_MEMTEST_START=0x80100000
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CONFIG_SYS_MEMTEST_END=0x83f00000

‎configs/ap152_defconfig

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Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_SYS_LOAD_ADDR=0x81000000
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CONFIG_ARCH_ATH79=y
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CONFIG_TARGET_AP152=y
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CONFIG_SYS_MIPS_TIMER_FREQ=375000000
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CONFIG_DEBUG_UART=y
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CONFIG_SYS_MEMTEST_START=0x80100000
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CONFIG_SYS_MEMTEST_END=0x83f00000

‎configs/bcm968380gerg_ram_defconfig

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="bcm968380gerg # "
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CONFIG_SYS_LOAD_ADDR=0x80100000
1010
CONFIG_ARCH_BMIPS=y
1111
CONFIG_SOC_BMIPS_BCM6838=y
12+
CONFIG_SYS_MIPS_TIMER_FREQ=160000000
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CONFIG_MIPS_CACHE_SETUP=y
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CONFIG_MIPS_CACHE_DISABLE=y
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

‎configs/boston32r2_defconfig

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
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CONFIG_SYS_LOAD_ADDR=0x88000000
1010
CONFIG_ENV_ADDR=0xBFFE0000
1111
CONFIG_TARGET_BOSTON=y
12+
CONFIG_SYS_MIPS_TIMER_FREQ=30000000
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
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# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
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CONFIG_MIPS_BOOT_FDT=y

‎configs/boston32r2el_defconfig

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
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CONFIG_SYS_LOAD_ADDR=0x88000000
1010
CONFIG_ENV_ADDR=0xBFFE0000
1111
CONFIG_TARGET_BOSTON=y
12+
CONFIG_SYS_MIPS_TIMER_FREQ=30000000
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
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# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
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CONFIG_MIPS_BOOT_FDT=y

‎configs/boston32r6_defconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
1010
CONFIG_ENV_ADDR=0xBFFE0000
1111
CONFIG_TARGET_BOSTON=y
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CONFIG_CPU_MIPS32_R6=y
13+
CONFIG_SYS_MIPS_TIMER_FREQ=30000000
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
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# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
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CONFIG_MIPS_BOOT_FDT=y

‎configs/boston32r6el_defconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
1010
CONFIG_ENV_ADDR=0xBFFE0000
1111
CONFIG_TARGET_BOSTON=y
1212
CONFIG_CPU_MIPS32_R6=y
13+
CONFIG_SYS_MIPS_TIMER_FREQ=30000000
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
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# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
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CONFIG_MIPS_BOOT_FDT=y

‎configs/boston64r2_defconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
1010
CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
1111
CONFIG_TARGET_BOSTON=y
1212
CONFIG_CPU_MIPS64_R2=y
13+
CONFIG_SYS_MIPS_TIMER_FREQ=30000000
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# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
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# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
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CONFIG_MIPS_BOOT_FDT=y

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