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ColinIanKingColinIanKing
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stress-cachehammer: add new stressor to exercise prefetch/flush cache ops
exercise the cache with a randomized mix of memory read/writes and where possible cache prefetches and cache flushes to random addresses in three emory mapped regions, one of which is shared among all the cache stressors and is the size of the L3 cache, one is local to each instance and is 4 times the L3 cache size and one is a single page mapping that cannot be read or written. Signed-off-by: Colin Ian King <[email protected]>
1 parent 86f83e8 commit db0fa0c

11 files changed

+557
-13
lines changed

‎Makefile

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@@ -349,6 +349,7 @@ STRESS_SRC = \
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stress-bsearch.c \
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stress-bubblesort.c \
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stress-cache.c \
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stress-cachehammer.c \
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stress-cacheline.c \
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stress-cap.c \
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stress-cgroup.c \

‎Makefile.config

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@@ -1241,6 +1241,7 @@ cpufeatures: \
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ASM_X86_PREFETCHT1 \
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ASM_X86_PREFETCHT2 \
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ASM_X86_PREFETCHW \
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ASM_X86_PREFETCHWT1 \
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ASM_X86_RDMSR \
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ASM_X86_RDPMC \
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ASM_X86_RDRAND \
@@ -1507,6 +1508,9 @@ ASM_X86_PREFETCHNTA:
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ASM_X86_PREFETCHW:
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$(call check,test-asm-x86-prefetchw,HAVE_ASM_X86_PREFETCHW,x86 prefetchw instruction)
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ASM_X86_PREFETCHWT1:
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$(call check,test-asm-x86-prefetchwt1,HAVE_ASM_X86_PREFETCHWT1,x86 prefetchwt1 instruction)
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ASM_X86_RDMSR:
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$(call check,test-asm-x86-rdmsr,HAVE_ASM_X86_RDMSR,x86 rdmsr instruction)
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‎core-asm-x86.h

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@@ -322,6 +322,13 @@ static inline void ALWAYS_INLINE stress_asm_x86_prefetchw(void *p)
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}
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#endif
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#if defined(HAVE_ASM_X86_PREFETCHWT1)
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static inline void ALWAYS_INLINE stress_asm_x86_prefetchwt1(void *p)
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{
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__asm__ __volatile__("prefetchwt1 (%0)\n" : : "r"(p) : "memory");
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}
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#endif
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#if !defined(HAVE_COMPILER_PCC) && \
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defined(STRESS_ARCH_X86_64) && \
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defined(STRESS_ARCH_X86_LP64)

‎core-cpu.c

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@@ -374,6 +374,27 @@ bool stress_cpu_x86_has_cldemote(void)
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#endif
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}
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/*
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* stress_cpu_x86_has_prefetchwt1()
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* does x86 cpu support prefetchwt1?
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*/
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bool stress_cpu_x86_has_prefetchwt1(void)
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{
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#if defined(STRESS_ARCH_X86)
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uint32_t ebx = 0, ecx = 0, edx = 0;
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if (!stress_cpu_is_x86())
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return false;
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stress_cpu_x86_extended_features(ebx, ecx, edx);
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return !!(ecx & CPUID_prefetchwt1_ECX);
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#else
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return false;
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#endif
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}
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/*
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* stress_cpu_x86_has_waitpkg()
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* does x86 cpu support waitpkg?

‎core-cpu.h

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@@ -23,24 +23,25 @@
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#include "core-arch.h"
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extern WARN_UNUSED bool stress_cpu_is_x86(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx_vnni(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_vl(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_vnni(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_bw(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_clflushopt(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_clwb(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_cldemote(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_waitpkg(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdseed(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_syscall(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdrand(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdtscp(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_tsc(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_msr(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_clfsh(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_mmx(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_msr(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_prefetchwt1(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdrand(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdseed(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_rdtscp(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_serialize(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_sse(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_sse2(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_serialize(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx_vnni(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_vl(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_vnni(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_avx512_bw(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_syscall(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_tsc(void);
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extern WARN_UNUSED bool stress_cpu_x86_has_waitpkg(void);
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#endif

‎core-opts.c

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@@ -106,6 +106,8 @@ const struct option stress_long_options[] = {
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{ "cache-prefetchw", 0, 0, OPT_cache_prefetchw },
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{ "cache-sfence", 0, 0, OPT_cache_sfence },
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{ "cache-ways", 1, 0, OPT_cache_ways },
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{ "cachehammer", 1, 0, OPT_cachehammer },
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{ "cachehammer-ops", 1, 0, OPT_cachehammer_ops },
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{ "cacheline", 1, 0, OPT_cacheline },
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{ "cacheline-affinity", 0, 0, OPT_cacheline_affinity },
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{ "cacheline-method", 1, 0, OPT_cacheline_method },

‎core-opts.h

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@@ -253,6 +253,9 @@ typedef enum {
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OPT_cache_prefetchw,
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OPT_cache_ways,
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OPT_cachehammer,
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OPT_cachehammer_ops,
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OPT_cacheline,
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OPT_cacheline_ops,
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OPT_cacheline_affinity,

‎core-stressors.h

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@@ -47,6 +47,7 @@
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MACRO(bsearch) \
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MACRO(bubblesort) \
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MACRO(cache) \
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MACRO(cachehammer) \
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MACRO(cacheline) \
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MACRO(cap) \
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MACRO(cgroup) \

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