From f65f765ffac1326a515cf2140e7779495dde7286 Mon Sep 17 00:00:00 2001
From: Jonathan Buch <jbuch@synyx.de>
Date: Sun, 24 Sep 2023 18:42:16 +0200
Subject: [PATCH] Respect clippy

---
 src/hart.rs | 4 ++--
 src/main.rs | 2 +-
 src/ram.rs  | 5 ++---
 src/see.rs  | 7 ++++---
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/hart.rs b/src/hart.rs
index 49b3cb6..50c4b27 100644
--- a/src/hart.rs
+++ b/src/hart.rs
@@ -30,13 +30,13 @@ impl Hart {
         };
 
         // RV32 I
-        m.csr[csr::MISA] = 0b01 << XLEN - 2 | 1 << 8;
+        m.csr[csr::MISA] = 0b01 << (XLEN - 2) | 1 << 8;
 
         // Non-commercial implementation
         m.csr[csr::MVENDORID] = 0;
 
         // Open-Source project, unregistered
-        m.csr[csr::MARCHID] = 0 << XLEN - 1 | 0;
+        m.csr[csr::MARCHID] = 0;
 
         // Version
         m.csr[csr::MIMPID] = 1;
diff --git a/src/main.rs b/src/main.rs
index 281c580..16e6823 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -24,7 +24,7 @@ fn main() {
         let handle = thread::spawn(move || {
             let mut m = Hart::new(ram);
             for _ in 0..100 {
-                if m.tick() == false {
+                if !m.tick() {
                     break;
                 }
             }
diff --git a/src/ram.rs b/src/ram.rs
index 4ddbbc7..762b250 100644
--- a/src/ram.rs
+++ b/src/ram.rs
@@ -25,7 +25,7 @@ impl Ram {
     pub fn write_word(&self, addr: usize, word: u32) {
         let mut shared = self.ram.write().unwrap();
 
-        shared[addr + 0] = ((word >> 0) & 0xFF) as u8;
+        shared[addr] = (word & 0xFF) as u8;
         shared[addr + 1] = ((word >> 8) & 0xFF) as u8;
         shared[addr + 2] = ((word >> 16) & 0xFF) as u8;
         shared[addr + 3] = ((word >> 24) & 0xFF) as u8;
@@ -40,8 +40,7 @@ impl Ram {
     pub fn read_word(&self, addr: usize) -> u32 {
         let shared = self.ram.read().unwrap();
 
-        let ins: u32 = 0
-            + ((shared[addr + 0] as u32) << 0)
+        let ins: u32 =  (shared[addr] as u32)
             + ((shared[addr + 1] as u32) << 8)
             + ((shared[addr + 2] as u32) << 16)
             + ((shared[addr + 3] as u32) << 24);
diff --git a/src/see.rs b/src/see.rs
index 5c5cd08..1ce9fc4 100644
--- a/src/see.rs
+++ b/src/see.rs
@@ -10,6 +10,7 @@ const SBI_IMPL_ID: u32 = 0xFFFFFFFF;
 const SBI_IMPL_VERSION: u32 = 1;
 
 #[allow(dead_code)]
+#[allow(clippy::upper_case_acronyms)]
 enum Register {
     // a0: in/out (Error Code)
     ARG0 = 10,
@@ -63,7 +64,7 @@ impl From<io::Error> for Error {
 // Base Extension (EID #0x10)
 
 fn sbi_get_spec_version() -> Result<u32, Error> {
-    Ok(SBI_VERSION.0 << 24 + SBI_VERSION.1)
+    Ok((SBI_VERSION.0 << 24) + SBI_VERSION.1)
 }
 
 fn sbi_get_sbi_impl_id() -> Result<u32, Error> {
@@ -102,14 +103,14 @@ fn sbi_console_putchar(value: u32) -> Result<u32, Error> {
 
     let mut handle = io::stdout().lock();
 
-    handle.write(&char)?;
+    handle.write_all(&char)?;
     handle.flush()?;
     Ok(0)
 }
 
 fn sbi_console_getchar() -> Result<u32, Error> {
     let mut buffer = [0];
-    io::stdin().read(&mut buffer)?;
+    io::stdin().read_exact(&mut buffer)?;
     Ok(buffer[0] as u32)
 }