Based on LPC11U35FHI33/501 chip (Data Sheet):
- Cortex-M0 48 Mhz
- 64 KB Flash
- 12 KB RAM
- Full-speed USB 2.0 device controller: 5 bi-directional endpoints including EP0(*)
- HVQFN32 packaging
(*) "Supports 10 physical (5 logical) endpoints including one control endpoint" (source: Data Sheet)
Region | Size | Start | End |
---|---|---|---|
Flash | 64 KB | 0x0000_0000 | 0x0001_0000 |
SRAM0 | 8 KB | 0x1000_0000 | 0x1000_2000 |
SRAM1 | 2 KB | 0x2000_0000 | 0x2000_0800 |
USB SRAM | 2 KB | 0x2000_4000 | 0x2000_4800 |
Because of the flash size limitation and the presence of a ROM USB loader (also Cortex-M0 does not support vector table relocation), the DAPLink bootloader is not used.
Signal | I/O | Symbol | Pin |
---|---|---|---|
SWD / JTAG | |||
SWCLK / TCK | O | PIO0_7 | 16 |
SWDIO / TMS | I/O | PIO0_8 | 17 |
SWO / TDO | I | PIO0_9 | 18 |
TDI | O | PIO0_17 | 30 |
nRESET | O | PIO0_2 | 8 |
UART | |||
UART TX | O | PIO0_18 | 31 |
UART RX | I | PIO0_19 | 32 |
Button | |||
NF-RST But. | I | PIO0_1 | 3 |
F-RST But. | I | PIO1_19 | 1 |
LEDs | |||
HID LED | O | PIO0_21 | 12 |
MSD LED | O | PIO0_20 | 7 |
CDC LED | O | PIO0_11 | 21 |