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| 1 | +/* |
| 2 | + * Copyright (c) 2013-2020 Arm Limited. All rights reserved. |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Licensed under the Apache License, Version 2.0 (the License); you may |
| 7 | + * not use this file except in compliance with the License. |
| 8 | + * You may obtain a copy of the License at |
| 9 | + * |
| 10 | + * www.apache.org/licenses/LICENSE-2.0 |
| 11 | + * |
| 12 | + * Unless required by applicable law or agreed to in writing, software |
| 13 | + * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 14 | + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 15 | + * See the License for the specific language governing permissions and |
| 16 | + * limitations under the License. |
| 17 | + */ |
| 18 | + |
| 19 | +#include "Driver_ETH_MAC.h" |
| 20 | + |
| 21 | +#define ARM_ETH_MAC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0) /* driver version */ |
| 22 | + |
| 23 | +/* Driver Version */ |
| 24 | +static const ARM_DRIVER_VERSION DriverVersion = { |
| 25 | + ARM_ETH_MAC_API_VERSION, |
| 26 | + ARM_ETH_MAC_DRV_VERSION |
| 27 | +}; |
| 28 | + |
| 29 | +/* Driver Capabilities */ |
| 30 | +static const ARM_ETH_MAC_CAPABILITIES DriverCapabilities = { |
| 31 | + 0, /* 1 = IPv4 header checksum verified on receive */ |
| 32 | + 0, /* 1 = IPv6 checksum verification supported on receive */ |
| 33 | + 0, /* 1 = UDP payload checksum verified on receive */ |
| 34 | + 0, /* 1 = TCP payload checksum verified on receive */ |
| 35 | + 0, /* 1 = ICMP payload checksum verified on receive */ |
| 36 | + 0, /* 1 = IPv4 header checksum generated on transmit */ |
| 37 | + 0, /* 1 = IPv6 checksum generation supported on transmit */ |
| 38 | + 0, /* 1 = UDP payload checksum generated on transmit */ |
| 39 | + 0, /* 1 = TCP payload checksum generated on transmit */ |
| 40 | + 0, /* 1 = ICMP payload checksum generated on transmit */ |
| 41 | + 0, /* Ethernet Media Interface type */ |
| 42 | + 0, /* 1 = driver provides initial valid MAC address */ |
| 43 | + 0, /* 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated */ |
| 44 | + 0, /* 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated */ |
| 45 | + 0, /* 1 = wakeup event \ref ARM_ETH_MAC_EVENT_WAKEUP generated */ |
| 46 | + 0, /* 1 = Precision Timer supported */ |
| 47 | + 0 /* Reserved (must be zero) */ |
| 48 | +}; |
| 49 | + |
| 50 | +// |
| 51 | +// Functions |
| 52 | +// |
| 53 | + |
| 54 | +static ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion(void) |
| 55 | +{ |
| 56 | + return DriverVersion; |
| 57 | +} |
| 58 | + |
| 59 | +static ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities(void) |
| 60 | +{ |
| 61 | + return DriverCapabilities; |
| 62 | +} |
| 63 | + |
| 64 | +static int32_t ARM_ETH_MAC_Initialize(ARM_ETH_MAC_SignalEvent_t cb_event) |
| 65 | +{ |
| 66 | + return 0; |
| 67 | +} |
| 68 | + |
| 69 | +static int32_t ARM_ETH_MAC_Uninitialize(void) |
| 70 | +{ |
| 71 | + return 0; |
| 72 | +} |
| 73 | + |
| 74 | +static int32_t ARM_ETH_MAC_PowerControl(ARM_POWER_STATE state) |
| 75 | +{ |
| 76 | + switch (state) |
| 77 | + { |
| 78 | + case ARM_POWER_OFF: |
| 79 | + break; |
| 80 | + |
| 81 | + case ARM_POWER_LOW: |
| 82 | + break; |
| 83 | + |
| 84 | + case ARM_POWER_FULL: |
| 85 | + break; |
| 86 | + } |
| 87 | + return ARM_DRIVER_OK; |
| 88 | +} |
| 89 | + |
| 90 | +static int32_t ARM_ETH_MAC_GetMacAddress(ARM_ETH_MAC_ADDR *ptr_addr) |
| 91 | +{ |
| 92 | + return 0; |
| 93 | +} |
| 94 | + |
| 95 | +static int32_t ARM_ETH_MAC_SetMacAddress(const ARM_ETH_MAC_ADDR *ptr_addr) |
| 96 | +{ |
| 97 | + return 0; |
| 98 | +} |
| 99 | + |
| 100 | +static int32_t ARM_ETH_MAC_SetAddressFilter(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr) |
| 101 | +{ |
| 102 | + return 0; |
| 103 | +} |
| 104 | + |
| 105 | +static int32_t ARM_ETH_MAC_SendFrame(const uint8_t *frame, uint32_t len, uint32_t flags) |
| 106 | +{ |
| 107 | + return 0; |
| 108 | +} |
| 109 | + |
| 110 | +static int32_t ARM_ETH_MAC_ReadFrame(uint8_t *frame, uint32_t len) |
| 111 | +{ |
| 112 | + return 0; |
| 113 | +} |
| 114 | + |
| 115 | +static uint32_t ARM_ETH_MAC_GetRxFrameSize(void) |
| 116 | +{ |
| 117 | + return 0U; |
| 118 | +} |
| 119 | + |
| 120 | +static int32_t ARM_ETH_MAC_GetRxFrameTime(ARM_ETH_MAC_TIME *time) |
| 121 | +{ |
| 122 | + return 0; |
| 123 | +} |
| 124 | + |
| 125 | +static int32_t ARM_ETH_MAC_GetTxFrameTime(ARM_ETH_MAC_TIME *time) |
| 126 | +{ |
| 127 | + return 0; |
| 128 | +} |
| 129 | + |
| 130 | +static int32_t ARM_ETH_MAC_Control(uint32_t control, uint32_t arg) |
| 131 | +{ |
| 132 | + switch (control) |
| 133 | + { |
| 134 | + case ARM_ETH_MAC_CONFIGURE: |
| 135 | + |
| 136 | + switch (arg & ARM_ETH_MAC_SPEED_Msk) |
| 137 | + { |
| 138 | + case ARM_ETH_MAC_SPEED_10M: |
| 139 | + break; |
| 140 | + case ARM_ETH_SPEED_100M: |
| 141 | + break; |
| 142 | + default: |
| 143 | + return ARM_DRIVER_ERROR_UNSUPPORTED; |
| 144 | + } |
| 145 | + |
| 146 | + switch (arg & ARM_ETH_MAC_DUPLEX_Msk) |
| 147 | + { |
| 148 | + case ARM_ETH_MAC_DUPLEX_FULL: |
| 149 | + break; |
| 150 | + } |
| 151 | + |
| 152 | + if (arg & ARM_ETH_MAC_LOOPBACK) |
| 153 | + { |
| 154 | + } |
| 155 | + |
| 156 | + if ((arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX) || |
| 157 | + (arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX)) |
| 158 | + { |
| 159 | + return ARM_DRIVER_ERROR_UNSUPPORTED; |
| 160 | + } |
| 161 | + |
| 162 | + if (!(arg & ARM_ETH_MAC_ADDRESS_BROADCAST)) |
| 163 | + { |
| 164 | + } |
| 165 | + |
| 166 | + if (arg & ARM_ETH_MAC_ADDRESS_MULTICAST) |
| 167 | + { |
| 168 | + } |
| 169 | + |
| 170 | + if (arg & ARM_ETH_MAC_ADDRESS_ALL) |
| 171 | + { |
| 172 | + } |
| 173 | + |
| 174 | + break; |
| 175 | + |
| 176 | + case ARM_ETH_MAC_CONTROL_TX: |
| 177 | + break; |
| 178 | + |
| 179 | + case ARM_ETH_MAC_CONTROL_RX: |
| 180 | + break; |
| 181 | + |
| 182 | + case ARM_ETH_MAC_FLUSH: |
| 183 | + if (arg & ARM_ETH_MAC_FLUSH_RX) |
| 184 | + { |
| 185 | + } |
| 186 | + if (arg & ARM_ETH_MAC_FLUSH_TX) |
| 187 | + { |
| 188 | + } |
| 189 | + break; |
| 190 | + |
| 191 | + case ARM_ETH_MAC_SLEEP: |
| 192 | + break; |
| 193 | + |
| 194 | + case ARM_ETH_MAC_VLAN_FILTER: |
| 195 | + break; |
| 196 | + |
| 197 | + default: |
| 198 | + return ARM_DRIVER_ERROR_UNSUPPORTED; |
| 199 | + } |
| 200 | + return 0; |
| 201 | +} |
| 202 | + |
| 203 | +static int32_t ARM_ETH_MAC_ControlTimer(uint32_t control, ARM_ETH_MAC_TIME *time) |
| 204 | +{ |
| 205 | + return 0; |
| 206 | +} |
| 207 | + |
| 208 | +static int32_t ARM_ETH_MAC_PHY_Read(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) |
| 209 | +{ |
| 210 | + return 0; |
| 211 | +} |
| 212 | + |
| 213 | +static int32_t ARM_ETH_MAC_PHY_Write(uint8_t phy_addr, uint8_t reg_addr, uint16_t data) |
| 214 | +{ |
| 215 | + return 0; |
| 216 | +} |
| 217 | + |
| 218 | +static void ARM_ETH_MAC_SignalEvent(uint32_t event) |
| 219 | +{ |
| 220 | +} |
| 221 | + |
| 222 | +// End ETH MAC Interface |
| 223 | + |
| 224 | +extern \ |
| 225 | +ARM_DRIVER_ETH_MAC Driver_ETH_MAC0; |
| 226 | +ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = |
| 227 | +{ |
| 228 | + ARM_ETH_MAC_GetVersion, |
| 229 | + ARM_ETH_MAC_GetCapabilities, |
| 230 | + ARM_ETH_MAC_Initialize, |
| 231 | + ARM_ETH_MAC_Uninitialize, |
| 232 | + ARM_ETH_MAC_PowerControl, |
| 233 | + ARM_ETH_MAC_GetMacAddress, |
| 234 | + ARM_ETH_MAC_SetMacAddress, |
| 235 | + ARM_ETH_MAC_SetAddressFilter, |
| 236 | + ARM_ETH_MAC_SendFrame, |
| 237 | + ARM_ETH_MAC_ReadFrame, |
| 238 | + ARM_ETH_MAC_GetRxFrameSize, |
| 239 | + ARM_ETH_MAC_GetRxFrameTime, |
| 240 | + ARM_ETH_MAC_GetTxFrameTime, |
| 241 | + ARM_ETH_MAC_ControlTimer, |
| 242 | + ARM_ETH_MAC_Control, |
| 243 | + ARM_ETH_MAC_PHY_Read, |
| 244 | + ARM_ETH_MAC_PHY_Write |
| 245 | +}; |
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