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| 1 | +/* |
| 2 | + * Copyright (c) 2017-2020, 2024-2025 Arm Limited. |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: MIT |
| 5 | + * |
| 6 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | + * of this software and associated documentation files (the "Software"), to |
| 8 | + * deal in the Software without restriction, including without limitation the |
| 9 | + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | + * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | + * furnished to do so, subject to the following conditions: |
| 12 | + * |
| 13 | + * The above copyright notice and this permission notice shall be included in all |
| 14 | + * copies or substantial portions of the Software. |
| 15 | + * |
| 16 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | + * SOFTWARE. |
| 23 | + */ |
| 24 | + |
| 25 | +#ifndef ACL_ARM_COMPUTE_RUNTIME_EXPERIMENTAL_OPERATORS_CPUPOOL2D_H |
| 26 | +#define ACL_ARM_COMPUTE_RUNTIME_EXPERIMENTAL_OPERATORS_CPUPOOL2D_H |
| 27 | + |
| 28 | +#include "arm_compute/core/TensorInfo.h" |
| 29 | +#include "arm_compute/core/Types.h" // required for PoolingLayerInfo |
| 30 | +#include "arm_compute/runtime/NEON/INEOperator.h" |
| 31 | + |
| 32 | +#include <memory> |
| 33 | + |
| 34 | +namespace arm_compute |
| 35 | +{ |
| 36 | +namespace experimental |
| 37 | +{ |
| 38 | +namespace op |
| 39 | +{ |
| 40 | + |
| 41 | +/* |
| 42 | + * A shallow wrapper for arm_compute::cpu::CpuPool2d. |
| 43 | + * Any new features should be added to arm_compute::cpu::CpuPool2d, |
| 44 | + * and arm_compute::experimental::op::CpuPool2d should remain a shallow wrapper. |
| 45 | + * Note this is not thread safe therefore no thread safety tests provided. |
| 46 | + */ |
| 47 | +class CpuPool2d : public INEOperator |
| 48 | +{ |
| 49 | +public: |
| 50 | + /** Constructor **/ |
| 51 | + CpuPool2d(); |
| 52 | + /** Prevent instances of this class from being copied (As this class contains pointers) **/ |
| 53 | + CpuPool2d(const CpuPool2d &) = delete; |
| 54 | + /** Prevent copy assignment **/ |
| 55 | + CpuPool2d &operator=(const CpuPool2d &) = delete; |
| 56 | + /** Default move constructor **/ |
| 57 | + CpuPool2d(CpuPool2d &&) = default; |
| 58 | + /** Default move assignment **/ |
| 59 | + CpuPool2d &operator=(CpuPool2d &&) = default; |
| 60 | + /** Default destructor **/ |
| 61 | + ~CpuPool2d() override; |
| 62 | + /** Set the src and dst tensors. |
| 63 | + * |
| 64 | + * Valid data layouts: |
| 65 | + * - NHWC |
| 66 | + * - NCHW |
| 67 | + * |
| 68 | + * Valid data type configurations: |
| 69 | + * |src |dst | |
| 70 | + * |:--------------|:--------------| |
| 71 | + * |QASYMM8 |QASYMM8 | |
| 72 | + * |QASYMM8_SIGNED |QASYMM8_SIGNED | |
| 73 | + * |F16 |F16 | |
| 74 | + * |F32 |F32 | |
| 75 | + * |
| 76 | + * @note F16 is supported for pool sizes 2 and 3 only |
| 77 | + * @note Source tensor is padded with -inf for MAX pooling and 0 otherwise |
| 78 | + * Cases where pooling region is completely outside input tensor are only supported for floating point data type |
| 79 | + * |
| 80 | + * @param[in, out] src Source tensor info. (Written to only when padding != 0) Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. |
| 81 | + * @param[out] dst Destination tensor info. Data types supported: same as @p src. |
| 82 | + * @param[in] pool_info Contains pooling operation information described in @ref PoolingLayerInfo. |
| 83 | + * @param[out] indices (optional) The indices of the maximal values. Data type supported: U32. |
| 84 | + */ |
| 85 | + void |
| 86 | + configure(ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &pool_info, ITensorInfo *indices = nullptr); |
| 87 | + /** Static function to check if given info will lead to a valid configuration |
| 88 | + * |
| 89 | + * Similar to @ref CpuPool2d::configure() |
| 90 | + */ |
| 91 | + |
| 92 | + static Status validate(const ITensorInfo *src, |
| 93 | + const ITensorInfo *dst, |
| 94 | + const PoolingLayerInfo &pool_info, |
| 95 | + const ITensorInfo *indices = nullptr); |
| 96 | + |
| 97 | + // Inherited methods overridden: |
| 98 | + void run(ITensorPack &tensors) override; |
| 99 | + experimental::MemoryRequirements workspace() const override; |
| 100 | + |
| 101 | +private: |
| 102 | + struct Impl; |
| 103 | + std::unique_ptr<Impl> impl_; |
| 104 | +}; |
| 105 | +} // namespace op |
| 106 | +} //namespace experimental |
| 107 | +} // namespace arm_compute |
| 108 | +#endif // ACL_ARM_COMPUTE_RUNTIME_EXPERIMENTAL_OPERATORS_CPUPOOL2D_H |
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